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[ARM] 5091/1: Add missing bitfield include to regs-lcd.h

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Macros like Fld() or FShft used in regs-lcd.h are defined in bitfield.h, but
the latter is not included.
Also fix one whitespace issue while being there.

Signed-off-by: Antonio Ospite <ao2@openezx.org>
Signed-off-by: Stefan Schmidt <stefan@datenfreihafen.org>
Acked-by: Eric Miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Stefan Schmidt 2008-06-12 07:07:22 +01:00 committed by Russell King
parent 62cfcf4f46
commit 3692fd0aae
1 changed files with 4 additions and 1 deletions
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5
include/asm-arm/arch-pxa/regs-lcd.h
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@ -1,5 +1,8 @@
#ifndef __ASM_ARCH_REGS_LCD_H #ifndef __ASM_ARCH_REGS_LCD_H
#define __ASM_ARCH_REGS_LCD_H #define __ASM_ARCH_REGS_LCD_H
#include <asm/arch/bitfield.h>
/* /*
* LCD Controller Registers and Bits Definitions * LCD Controller Registers and Bits Definitions
*/ */
@ -69,7 +72,7 @@
#define LCCR0_QDM (1 << 11) /* LCD Quick Disable mask */ #define LCCR0_QDM (1 << 11) /* LCD Quick Disable mask */
#define LCCR0_PDD (0xff << 12) /* Palette DMA request delay */ #define LCCR0_PDD (0xff << 12) /* Palette DMA request delay */
#define LCCR0_PDD_S 12 #define LCCR0_PDD_S 12
#define LCCR0_BM (1 << 20) /* Branch mask */ #define LCCR0_BM (1 << 20) /* Branch mask */
#define LCCR0_OUM (1 << 21) /* Output FIFO underrun mask */ #define LCCR0_OUM (1 << 21) /* Output FIFO underrun mask */
#define LCCR0_LCDT (1 << 22) /* LCD panel type */ #define LCCR0_LCDT (1 << 22) /* LCD panel type */
#define LCCR0_RDSTM (1 << 23) /* Read status interrupt mask */ #define LCCR0_RDSTM (1 << 23) /* Read status interrupt mask */