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ARM: dts: berlin: convert BG2 to DT clock nodes

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This converts Berlin BG2 SoC dtsi to make use of the new DT clock
nodes for Berlin SoCs. While at it, also fix up twdclk which is
running at cpuclk/3 instead of sysclk.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
This commit is contained in:
Sebastian Hesselbarth 2014-05-11 21:32:41 +02:00
parent 556f4a33a9
commit 36601dbf69
1 changed files with 23 additions and 33 deletions
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56
arch/arm/boot/dts/berlin2.dtsi
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@ -12,6 +12,7 @@
*/
#include "skeleton.dtsi"
#include <dt-bindings/clock/berlin2.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
/ {
@ -37,24 +38,10 @@
};
};
clocks {
smclk: sysmgr-clock {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <25000000>;
};
cfgclk: cfg-clock {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <100000000>;
};
sysclk: system-clock {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <400000000>;
};
refclk: oscillator {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <25000000>;
};
soc {
@ -88,7 +75,7 @@
compatible = "arm,cortex-a9-twd-timer";
reg = <0xad0600 0x20>;
interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&sysclk>;
clocks = <&chip CLKID_TWD>;
};
apb@e80000 {
@ -175,7 +162,7 @@
compatible = "snps,dw-apb-timer";
reg = <0x2c00 0x14>;
interrupts = <8>;
clocks = <&cfgclk>;
clocks = <&chip CLKID_CFG>;
clock-names = "timer";
status = "okay";
};
@ -184,7 +171,7 @@
compatible = "snps,dw-apb-timer";
reg = <0x2c14 0x14>;
interrupts = <9>;
clocks = <&cfgclk>;
clocks = <&chip CLKID_CFG>;
clock-names = "timer";
status = "okay";
};
@ -193,7 +180,7 @@
compatible = "snps,dw-apb-timer";
reg = <0x2c28 0x14>;
interrupts = <10>;
clocks = <&cfgclk>;
clocks = <&chip CLKID_CFG>;
clock-names = "timer";
status = "disabled";
};
@ -202,7 +189,7 @@
compatible = "snps,dw-apb-timer";
reg = <0x2c3c 0x14>;
interrupts = <11>;
clocks = <&cfgclk>;
clocks = <&chip CLKID_CFG>;
clock-names = "timer";
status = "disabled";
};
@ -211,7 +198,7 @@
compatible = "snps,dw-apb-timer";
reg = <0x2c50 0x14>;
interrupts = <12>;
clocks = <&cfgclk>;
clocks = <&chip CLKID_CFG>;
clock-names = "timer";
status = "disabled";
};
@ -220,7 +207,7 @@
compatible = "snps,dw-apb-timer";
reg = <0x2c64 0x14>;
interrupts = <13>;
clocks = <&cfgclk>;
clocks = <&chip CLKID_CFG>;
clock-names = "timer";
status = "disabled";
};
@ -229,7 +216,7 @@
compatible = "snps,dw-apb-timer";
reg = <0x2c78 0x14>;
interrupts = <14>;
clocks = <&cfgclk>;
clocks = <&chip CLKID_CFG>;
clock-names = "timer";
status = "disabled";
};
@ -238,7 +225,7 @@
compatible = "snps,dw-apb-timer";
reg = <0x2c8c 0x14>;
interrupts = <15>;
clocks = <&cfgclk>;
clocks = <&chip CLKID_CFG>;
clock-names = "timer";
status = "disabled";
};
@ -253,9 +240,12 @@
};
};
generic-regs@ea0184 {
compatible = "marvell,berlin-generic-regs", "syscon";
reg = <0xea0184 0x10>;
chip: chip-control@ea0000 {
compatible = "marvell,berlin2-chip-ctrl";
#clock-cells = <1>;
reg = <0xea0000 0x400>;
clocks = <&refclk>;
clock-names = "refclk";
};
apb@fc0000 {
@ -305,7 +295,7 @@
reg-shift = <2>;
reg-io-width = <1>;
interrupts = <8>;
clocks = <&smclk>;
clocks = <&refclk>;
status = "disabled";
};
@ -315,7 +305,7 @@
reg-shift = <2>;
reg-io-width = <1>;
interrupts = <9>;
clocks = <&smclk>;
clocks = <&refclk>;
status = "disabled";
};
@ -325,7 +315,7 @@
reg-shift = <2>;
reg-io-width = <1>;
interrupts = <10>;
clocks = <&smclk>;
clocks = <&refclk>;
status = "disabled";
};