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[POWERPC] mpc82xx: Add pq2fads board support.
Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This commit is contained in:
Scott Wood
Kumar Gala
parent
e00c5498a2
commit
3611f2ad42
229
arch/powerpc/boot/dts/pq2fads.dts
Normal file
229
arch/powerpc/boot/dts/pq2fads.dts
Normal file
@ -0,0 +1,229 @@
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/*
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* Device Tree for the PQ2FADS-ZU board with an MPC8280 chip.
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*
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* Copyright 2007 Freescale Semiconductor Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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/ {
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model = "pq2fads";
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compatible = "fsl,pq2fads";
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#address-cells = <1>;
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#size-cells = <1>;
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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reg = <0>;
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d-cache-line-size = <d#32>;
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i-cache-line-size = <d#32>;
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d-cache-size = <d#16384>;
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i-cache-size = <d#16384>;
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timebase-frequency = <0>;
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clock-frequency = <0>;
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};
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};
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memory {
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device_type = "memory";
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reg = <0 0>;
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};
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localbus@f0010100 {
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compatible = "fsl,mpc8280-localbus",
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"fsl,pq2-localbus";
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#address-cells = <2>;
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#size-cells = <1>;
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reg = <f0010100 60>;
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ranges = <0 0 fe000000 00800000
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1 0 f4500000 00008000
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8 0 f8200000 00008000>;
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flash@0,0 {
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compatible = "jedec-flash";
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reg = <0 0 800000>;
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bank-width = <4>;
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device-width = <1>;
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};
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bcsr@1,0 {
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reg = <1 0 20>;
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compatible = "fsl,pq2fads-bcsr";
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};
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PCI_PIC: pic@8,0 {
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#interrupt-cells = <1>;
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interrupt-controller;
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reg = <8 0 8>;
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compatible = "fsl,pq2ads-pci-pic";
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interrupt-parent = <&PIC>;
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interrupts = <18 8>;
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};
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};
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pci@f0010800 {
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device_type = "pci";
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reg = <f0010800 10c f00101ac 8 f00101c4 8>;
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compatible = "fsl,mpc8280-pci", "fsl,pq2-pci";
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#interrupt-cells = <1>;
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#size-cells = <2>;
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#address-cells = <3>;
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clock-frequency = <d#66000000>;
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interrupt-map-mask = <f800 0 0 7>;
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interrupt-map = <
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/* IDSEL 0x16 */
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b000 0 0 1 &PCI_PIC 0
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b000 0 0 2 &PCI_PIC 1
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b000 0 0 3 &PCI_PIC 2
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b000 0 0 4 &PCI_PIC 3
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/* IDSEL 0x17 */
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b800 0 0 1 &PCI_PIC 4
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b800 0 0 2 &PCI_PIC 5
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b800 0 0 3 &PCI_PIC 6
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b800 0 0 4 &PCI_PIC 7
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/* IDSEL 0x18 */
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c000 0 0 1 &PCI_PIC 8
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c000 0 0 2 &PCI_PIC 9
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c000 0 0 3 &PCI_PIC a
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c000 0 0 4 &PCI_PIC b>;
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interrupt-parent = <&PIC>;
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interrupts = <12 8>;
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ranges = <42000000 0 80000000 80000000 0 20000000
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02000000 0 a0000000 a0000000 0 20000000
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01000000 0 00000000 f6000000 0 02000000>;
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};
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soc@f0000000 {
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#address-cells = <1>;
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#size-cells = <1>;
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device_type = "soc";
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compatible = "fsl,mpc8280", "fsl,pq2-soc";
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ranges = <00000000 f0000000 00053000>;
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// Temporary -- will go away once kernel uses ranges for get_immrbase().
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reg = <f0000000 00053000>;
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cpm@119c0 {
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#address-cells = <1>;
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#size-cells = <1>;
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#interrupt-cells = <2>;
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compatible = "fsl,mpc8280-cpm", "fsl,cpm2";
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reg = <119c0 30 0 2000>;
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ranges;
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brg@119f0 {
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compatible = "fsl,mpc8280-brg",
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"fsl,cpm2-brg",
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"fsl,cpm-brg";
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reg = <119f0 10 115f0 10>;
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};
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serial@11a00 {
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device_type = "serial";
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compatible = "fsl,mpc8280-scc-uart",
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"fsl,cpm2-scc-uart";
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reg = <11a00 20 8000 100>;
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interrupts = <28 8>;
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interrupt-parent = <&PIC>;
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fsl,cpm-brg = <1>;
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fsl,cpm-command = <00800000>;
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};
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serial@11a20 {
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device_type = "serial";
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compatible = "fsl,mpc8280-scc-uart",
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"fsl,cpm2-scc-uart";
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reg = <11a20 20 8100 100>;
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interrupts = <29 8>;
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interrupt-parent = <&PIC>;
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fsl,cpm-brg = <2>;
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fsl,cpm-command = <04a00000>;
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};
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ethernet@11320 {
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device_type = "network";
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compatible = "fsl,mpc8280-fcc-enet",
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"fsl,cpm2-fcc-enet";
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reg = <11320 20 8500 100 113b0 1>;
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interrupts = <21 8>;
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interrupt-parent = <&PIC>;
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phy-handle = <&PHY0>;
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linux,network-index = <0>;
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fsl,cpm-command = <16200300>;
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};
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ethernet@11340 {
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device_type = "network";
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compatible = "fsl,mpc8280-fcc-enet",
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"fsl,cpm2-fcc-enet";
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reg = <11340 20 8600 100 113d0 1>;
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interrupts = <22 8>;
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interrupt-parent = <&PIC>;
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phy-handle = <&PHY1>;
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linux,network-index = <1>;
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fsl,cpm-command = <1a400300>;
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local-mac-address = [00 e0 0c 00 79 01];
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};
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mdio@10d40 {
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device_type = "mdio";
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compatible = "fsl,pq2fads-mdio-bitbang",
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"fsl,mpc8280-mdio-bitbang",
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"fsl,cpm2-mdio-bitbang";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <10d40 14>;
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fsl,mdio-pin = <9>;
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fsl,mdc-pin = <a>;
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PHY0: ethernet-phy@0 {
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interrupt-parent = <&PIC>;
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interrupts = <19 2>;
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reg = <0>;
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device_type = "ethernet-phy";
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};
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PHY1: ethernet-phy@1 {
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interrupt-parent = <&PIC>;
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interrupts = <19 2>;
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reg = <3>;
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device_type = "ethernet-phy";
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};
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};
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usb@11b60 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,mpc8280-usb",
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"fsl,cpm2-usb";
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reg = <11b60 18 8b00 100>;
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interrupt-parent = <&PIC>;
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interrupts = <b 8>;
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fsl,cpm-command = <2e600000>;
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};
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};
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PIC: interrupt-controller@10c00 {
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#interrupt-cells = <2>;
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interrupt-controller;
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reg = <10c00 80>;
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compatible = "fsl,mpc8280-pic", "fsl,cpm2-pic";
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};
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};
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chosen {
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linux,stdout-path = "/soc/cpm/serial@11a00";
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};
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};
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1003
arch/powerpc/configs/pq2fads_defconfig
Normal file
1003
arch/powerpc/configs/pq2fads_defconfig
Normal file
File diff suppressed because it is too large
Load Diff
@ -15,6 +15,17 @@ config MPC8272_ADS
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help
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This option enables support for the MPC8272 ADS board
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config PQ2FADS
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bool "Freescale PQ2FADS"
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select DEFAULT_UIMAGE
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select PQ2ADS
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select 8260
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select FSL_SOC
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select PQ2_ADS_PCI_PIC if PCI
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select PPC_CPM_NEW_BINDING
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help
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This option enables support for the PQ2FADS board
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endchoice
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config PQ2ADS
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@ -4,3 +4,4 @@
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obj-$(CONFIG_MPC8272_ADS) += mpc8272_ads.o
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obj-$(CONFIG_CPM2) += pq2.o
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obj-$(CONFIG_PQ2_ADS_PCI_PIC) += pq2ads-pci-pic.o
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obj-$(CONFIG_PQ2FADS) += pq2fads.o
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198
arch/powerpc/platforms/82xx/pq2fads.c
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198
arch/powerpc/platforms/82xx/pq2fads.c
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@ -0,0 +1,198 @@
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/*
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* PQ2FADS board support
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*
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* Copyright 2007 Freescale Semiconductor, Inc.
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* Author: Scott Wood <scottwood@freescale.com>
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*
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* Loosely based on mp82xx ADS support by Vitaly Bordug <vbordug@ru.mvista.com>
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* Copyright (c) 2006 MontaVista Software, Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*/
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/fsl_devices.h>
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#include <asm/io.h>
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#include <asm/cpm2.h>
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#include <asm/udbg.h>
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#include <asm/machdep.h>
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#include <asm/of_platform.h>
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#include <asm/time.h>
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#include <sysdev/fsl_soc.h>
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#include <sysdev/cpm2_pic.h>
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#include "pq2ads.h"
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#include "pq2.h"
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static void __init pq2fads_pic_init(void)
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{
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struct device_node *np = of_find_compatible_node(NULL, NULL, "fsl,cpm2-pic");
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if (!np) {
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printk(KERN_ERR "PIC init: can not find fsl,cpm2-pic node\n");
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return;
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}
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cpm2_pic_init(np);
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of_node_put(np);
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/* Initialize stuff for the 82xx CPLD IC and install demux */
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pq2ads_pci_init_irq();
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}
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struct cpm_pin {
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int port, pin, flags;
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};
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static struct cpm_pin pq2fads_pins[] = {
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/* SCC1 */
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{3, 30, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
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{3, 31, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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/* SCC2 */
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{3, 27, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
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{3, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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/* FCC2 */
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{1, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{1, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{1, 20, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{1, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{1, 22, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
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{1, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
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{1, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
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{1, 25, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
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{1, 26, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{1, 27, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{1, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{1, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
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{1, 30, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{1, 31, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
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{2, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{2, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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/* FCC3 */
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{1, 4, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
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{1, 5, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
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{1, 6, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
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{1, 7, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
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{1, 8, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{1, 9, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{1, 10, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{1, 11, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{1, 12, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{1, 13, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{1, 14, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
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{1, 15, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
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{1, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{1, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{2, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{2, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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};
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static void __init init_ioports(void)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(pq2fads_pins); i++) {
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struct cpm_pin *pin = &pq2fads_pins[i];
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cpm2_set_pin(pin->port, pin->pin, pin->flags);
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}
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cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_RX);
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cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_TX);
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cpm2_clk_setup(CPM_CLK_SCC2, CPM_BRG2, CPM_CLK_RX);
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cpm2_clk_setup(CPM_CLK_SCC2, CPM_BRG2, CPM_CLK_TX);
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cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK13, CPM_CLK_RX);
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cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK14, CPM_CLK_TX);
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cpm2_clk_setup(CPM_CLK_FCC3, CPM_CLK15, CPM_CLK_RX);
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cpm2_clk_setup(CPM_CLK_FCC3, CPM_CLK16, CPM_CLK_TX);
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}
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static void __init pq2fads_setup_arch(void)
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{
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struct device_node *np;
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__be32 __iomem *bcsr;
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if (ppc_md.progress)
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ppc_md.progress("pq2fads_setup_arch()", 0);
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cpm2_reset();
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np = of_find_compatible_node(NULL, NULL, "fsl,pq2fads-bcsr");
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if (!np) {
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printk(KERN_ERR "No fsl,pq2fads-bcsr in device tree\n");
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return;
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}
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bcsr = of_iomap(np, 0);
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if (!bcsr) {
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printk(KERN_ERR "Cannot map BCSR registers\n");
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return;
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}
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of_node_put(np);
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/* Enable the serial and ethernet ports */
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clrbits32(&bcsr[1], BCSR1_RS232_EN1 | BCSR1_RS232_EN2 | BCSR1_FETHIEN);
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setbits32(&bcsr[1], BCSR1_FETH_RST);
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clrbits32(&bcsr[3], BCSR3_FETHIEN2);
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setbits32(&bcsr[3], BCSR3_FETH2_RST);
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iounmap(bcsr);
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init_ioports();
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/* Enable external IRQs */
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clrbits32(&cpm2_immr->im_siu_conf.siu_82xx.sc_siumcr, 0x0c000000);
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pq2_init_pci();
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if (ppc_md.progress)
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ppc_md.progress("pq2fads_setup_arch(), finish", 0);
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}
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/*
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* Called very early, device-tree isn't unflattened
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*/
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static int __init pq2fads_probe(void)
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{
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unsigned long root = of_get_flat_dt_root();
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return of_flat_dt_is_compatible(root, "fsl,pq2fads");
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}
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static struct of_device_id __initdata of_bus_ids[] = {
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{ .name = "soc", },
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{ .name = "cpm", },
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{ .name = "localbus", },
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{},
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};
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static int __init declare_of_platform_devices(void)
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{
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if (!machine_is(pq2fads))
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return 0;
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/* Publish the QE devices */
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of_platform_bus_probe(NULL, of_bus_ids, NULL);
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return 0;
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}
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device_initcall(declare_of_platform_devices);
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||||
|
||||
define_machine(pq2fads)
|
||||
{
|
||||
.name = "Freescale PQ2FADS",
|
||||
.probe = pq2fads_probe,
|
||||
.setup_arch = pq2fads_setup_arch,
|
||||
.init_IRQ = pq2fads_pic_init,
|
||||
.get_irq = cpm2_get_irq,
|
||||
.calibrate_decr = generic_calibrate_decr,
|
||||
.restart = pq2_restart,
|
||||
.progress = udbg_progress,
|
||||
};
|
||||
Loading…
Reference in New Issue
Block a user