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net: aquantia: synchronized flow control between mac/phy
Flow control statuses were not synchronized between blocks,
that caused packets/link drop on some corner cases, when
MAC sent PFC although Phy was not expecting these to come.
Driver should readout the negotiated FC from phy and
configure RX block accordigly.
This is done on each link change event with information from FW.
Fixes: 288551de45
("net: aquantia: Implement rx/tx flow control ethtools callback")
Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
parent
85b18b0237
commit
35e8e8b45d
@ -407,13 +407,13 @@ static void aq_ethtool_get_pauseparam(struct net_device *ndev,
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struct ethtool_pauseparam *pause)
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{
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struct aq_nic_s *aq_nic = netdev_priv(ndev);
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u32 fc = aq_nic->aq_nic_cfg.flow_control;
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pause->autoneg = 0;
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if (aq_nic->aq_hw->aq_nic_cfg->flow_control & AQ_NIC_FC_RX)
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pause->rx_pause = 1;
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if (aq_nic->aq_hw->aq_nic_cfg->flow_control & AQ_NIC_FC_TX)
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pause->tx_pause = 1;
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pause->rx_pause = !!(fc & AQ_NIC_FC_RX);
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pause->tx_pause = !!(fc & AQ_NIC_FC_TX);
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}
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static int aq_ethtool_set_pauseparam(struct net_device *ndev,
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@ -204,6 +204,7 @@ struct aq_hw_ops {
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int (*hw_get_fw_version)(struct aq_hw_s *self, u32 *fw_version);
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int (*hw_set_fc)(struct aq_hw_s *self, u32 fc, u32 tc);
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};
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struct aq_fw_ops {
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@ -226,6 +227,8 @@ struct aq_fw_ops {
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int (*update_stats)(struct aq_hw_s *self);
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u32 (*get_flow_control)(struct aq_hw_s *self, u32 *fcmode);
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int (*set_flow_control)(struct aq_hw_s *self);
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int (*set_power)(struct aq_hw_s *self, unsigned int power_state,
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@ -124,6 +124,7 @@ void aq_nic_cfg_start(struct aq_nic_s *self)
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static int aq_nic_update_link_status(struct aq_nic_s *self)
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{
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int err = self->aq_fw_ops->update_link_status(self->aq_hw);
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u32 fc = 0;
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if (err)
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return err;
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@ -133,6 +134,15 @@ static int aq_nic_update_link_status(struct aq_nic_s *self)
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AQ_CFG_DRV_NAME, self->link_status.mbps,
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self->aq_hw->aq_link_status.mbps);
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aq_nic_update_interrupt_moderation_settings(self);
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/* Driver has to update flow control settings on RX block
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* on any link event.
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* We should query FW whether it negotiated FC.
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*/
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if (self->aq_fw_ops->get_flow_control)
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self->aq_fw_ops->get_flow_control(self->aq_hw, &fc);
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if (self->aq_hw_ops->hw_set_fc)
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self->aq_hw_ops->hw_set_fc(self->aq_hw, fc, 0);
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}
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self->link_status = self->aq_hw->aq_link_status;
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@ -772,7 +782,9 @@ void aq_nic_get_link_ksettings(struct aq_nic_s *self,
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ethtool_link_ksettings_add_link_mode(cmd, advertising,
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Pause);
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if (self->aq_nic_cfg.flow_control & AQ_NIC_FC_TX)
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/* Asym is when either RX or TX, but not both */
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if (!!(self->aq_nic_cfg.flow_control & AQ_NIC_FC_TX) ^
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!!(self->aq_nic_cfg.flow_control & AQ_NIC_FC_RX))
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ethtool_link_ksettings_add_link_mode(cmd, advertising,
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Asym_Pause);
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@ -100,12 +100,17 @@ static int hw_atl_b0_hw_reset(struct aq_hw_s *self)
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return err;
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}
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static int hw_atl_b0_set_fc(struct aq_hw_s *self, u32 fc, u32 tc)
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{
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hw_atl_rpb_rx_xoff_en_per_tc_set(self, !!(fc & AQ_NIC_FC_RX), tc);
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return 0;
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}
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static int hw_atl_b0_hw_qos_set(struct aq_hw_s *self)
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{
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u32 tc = 0U;
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u32 buff_size = 0U;
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unsigned int i_priority = 0U;
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bool is_rx_flow_control = false;
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/* TPS Descriptor rate init */
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hw_atl_tps_tx_pkt_shed_desc_rate_curr_time_res_set(self, 0x0U);
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@ -138,7 +143,6 @@ static int hw_atl_b0_hw_qos_set(struct aq_hw_s *self)
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/* QoS Rx buf size per TC */
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tc = 0;
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is_rx_flow_control = (AQ_NIC_FC_RX & self->aq_nic_cfg->flow_control);
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buff_size = HW_ATL_B0_RXBUF_MAX;
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hw_atl_rpb_rx_pkt_buff_size_per_tc_set(self, buff_size, tc);
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@ -150,7 +154,8 @@ static int hw_atl_b0_hw_qos_set(struct aq_hw_s *self)
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(buff_size *
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(1024U / 32U) * 50U) /
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100U, tc);
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hw_atl_rpb_rx_xoff_en_per_tc_set(self, is_rx_flow_control ? 1U : 0U, tc);
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hw_atl_b0_set_fc(self, self->aq_nic_cfg->flow_control, tc);
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/* QoS 802.1p priority -> TC mapping */
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for (i_priority = 8U; i_priority--;)
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@ -963,4 +968,5 @@ const struct aq_hw_ops hw_atl_ops_b0 = {
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.hw_get_regs = hw_atl_utils_hw_get_regs,
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.hw_get_hw_stats = hw_atl_utils_get_hw_stats,
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.hw_get_fw_version = hw_atl_utils_get_fw_version,
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.hw_set_fc = hw_atl_b0_set_fc,
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};
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@ -30,6 +30,8 @@
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#define HW_ATL_FW2X_MPI_STATE_ADDR 0x370
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#define HW_ATL_FW2X_MPI_STATE2_ADDR 0x374
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#define HW_ATL_FW2X_CAP_PAUSE BIT(CAPS_HI_PAUSE)
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#define HW_ATL_FW2X_CAP_ASYM_PAUSE BIT(CAPS_HI_ASYMMETRIC_PAUSE)
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#define HW_ATL_FW2X_CAP_SLEEP_PROXY BIT(CAPS_HI_SLEEP_PROXY)
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#define HW_ATL_FW2X_CAP_WOL BIT(CAPS_HI_WOL)
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@ -451,6 +453,24 @@ static int aq_fw2x_set_flow_control(struct aq_hw_s *self)
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return 0;
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}
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static u32 aq_fw2x_get_flow_control(struct aq_hw_s *self, u32 *fcmode)
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{
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u32 mpi_state = aq_hw_read_reg(self, HW_ATL_FW2X_MPI_STATE2_ADDR);
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if (mpi_state & HW_ATL_FW2X_CAP_PAUSE)
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if (mpi_state & HW_ATL_FW2X_CAP_ASYM_PAUSE)
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*fcmode = AQ_NIC_FC_RX;
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else
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*fcmode = AQ_NIC_FC_RX | AQ_NIC_FC_TX;
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else
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if (mpi_state & HW_ATL_FW2X_CAP_ASYM_PAUSE)
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*fcmode = AQ_NIC_FC_TX;
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else
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*fcmode = 0;
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return 0;
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}
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const struct aq_fw_ops aq_fw_2x_ops = {
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.init = aq_fw2x_init,
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.deinit = aq_fw2x_deinit,
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@ -465,4 +485,5 @@ const struct aq_fw_ops aq_fw_2x_ops = {
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.set_eee_rate = aq_fw2x_set_eee_rate,
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.get_eee_rate = aq_fw2x_get_eee_rate,
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.set_flow_control = aq_fw2x_set_flow_control,
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.get_flow_control = aq_fw2x_get_flow_control
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};
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