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ARM: imx6: initialize CCM_CLPCR_LPM into RUN mode earlier
Commit 4631960d26da ("ARM: imx6: set initial power mode in pm function")
moves imx6_set_lpm() from clock init function into
imx6_pm_common_init(). This causes a hang when cpuidle support is
enabled. The reason for that is ARM core clock is shut down
unexpectedly by WAIT mode. It happens with the following call stack:
cpuidle_register_governor()
cpuidle_switch_governor()
cpuidle_uninstall_idle_handler()
synchronize_sched()
wait_rcu_gp()
wait_for_completion()
When wait_for_completion() is called as above, all cores are idle/WFI.
Hence, the reset value of CCM_CLPCR_LPM - WAIT mode, will trigger a
hardware shutdown of the ARM core clock.
To fix the regression, we need to ensure that CCM_CLPCR_LPM is
initialized into RUN mode earlier than cpuidle governor registration,
which is a postcore_initcall. This patch creates function
imx6_pm_ccm_init() to map CCM block and initialize CCM_CLPCR_LPM into
RUN mode, and have the function called from machine .init_irq hook,
which should be early enough.
Reported-by: Kevin Hilman <khilman@kernel.org>
Fixes: 8fb76a07e2
("ARM: imx6: set initial power mode in pm function")
Tested-by: Kevin Hilman <khilman@linaro.org>
Tested-by: Tyler Baker <tyler.baker@linaro.org>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
This commit is contained in:
parent
de8e434d09
commit
35e2916f70
@ -123,6 +123,7 @@ static inline void v7_cpu_resume(void) {}
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static inline void imx6_suspend(void __iomem *ocram_vbase) {}
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#endif
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void imx6_pm_ccm_init(const char *ccm_compat);
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void imx6q_pm_init(void);
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void imx6dl_pm_init(void);
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void imx6sl_pm_init(void);
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@ -393,6 +393,7 @@ static void __init imx6q_init_irq(void)
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imx_init_l2cache();
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imx_src_init();
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irqchip_init();
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imx6_pm_ccm_init("fsl,imx6q-ccm");
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}
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static const char * const imx6q_dt_compat[] __initconst = {
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@ -66,6 +66,7 @@ static void __init imx6sl_init_irq(void)
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imx_init_l2cache();
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imx_src_init();
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irqchip_init();
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imx6_pm_ccm_init("fsl,imx6sl-ccm");
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}
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static const char * const imx6sl_dt_compat[] __initconst = {
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@ -86,6 +86,7 @@ static void __init imx6sx_init_irq(void)
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imx_init_l2cache();
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imx_src_init();
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irqchip_init();
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imx6_pm_ccm_init("fsl,imx6sx-ccm");
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}
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static void __init imx6sx_init_late(void)
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@ -89,7 +89,6 @@ struct imx6_pm_base {
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struct imx6_pm_socdata {
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u32 ddr_type;
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const char *ccm_compat;
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const char *mmdc_compat;
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const char *src_compat;
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const char *iomuxc_compat;
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@ -139,7 +138,6 @@ static const u32 imx6sx_mmdc_io_offset[] __initconst = {
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};
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static const struct imx6_pm_socdata imx6q_pm_data __initconst = {
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.ccm_compat = "fsl,imx6q-ccm",
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.mmdc_compat = "fsl,imx6q-mmdc",
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.src_compat = "fsl,imx6q-src",
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.iomuxc_compat = "fsl,imx6q-iomuxc",
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@ -149,7 +147,6 @@ static const struct imx6_pm_socdata imx6q_pm_data __initconst = {
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};
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static const struct imx6_pm_socdata imx6dl_pm_data __initconst = {
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.ccm_compat = "fsl,imx6q-ccm",
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.mmdc_compat = "fsl,imx6q-mmdc",
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.src_compat = "fsl,imx6q-src",
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.iomuxc_compat = "fsl,imx6dl-iomuxc",
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@ -159,7 +156,6 @@ static const struct imx6_pm_socdata imx6dl_pm_data __initconst = {
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};
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static const struct imx6_pm_socdata imx6sl_pm_data __initconst = {
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.ccm_compat = "fsl,imx6sl-ccm",
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.mmdc_compat = "fsl,imx6sl-mmdc",
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.src_compat = "fsl,imx6sl-src",
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.iomuxc_compat = "fsl,imx6sl-iomuxc",
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@ -169,7 +165,6 @@ static const struct imx6_pm_socdata imx6sl_pm_data __initconst = {
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};
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static const struct imx6_pm_socdata imx6sx_pm_data __initconst = {
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.ccm_compat = "fsl,imx6sx-ccm",
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.mmdc_compat = "fsl,imx6sx-mmdc",
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.src_compat = "fsl,imx6sx-src",
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.iomuxc_compat = "fsl,imx6sx-iomuxc",
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@ -553,16 +548,11 @@ put_node:
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static void __init imx6_pm_common_init(const struct imx6_pm_socdata
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*socdata)
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{
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struct device_node *np;
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struct regmap *gpr;
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int ret;
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np = of_find_compatible_node(NULL, NULL, socdata->ccm_compat);
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ccm_base = of_iomap(np, 0);
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WARN_ON(!ccm_base);
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imx6_set_lpm(WAIT_CLOCKED);
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if (IS_ENABLED(CONFIG_SUSPEND)) {
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ret = imx6q_suspend_init(socdata);
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if (ret)
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@ -583,6 +573,24 @@ static void __init imx6_pm_common_init(const struct imx6_pm_socdata
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IMX6Q_GPR1_GINT);
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}
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void __init imx6_pm_ccm_init(const char *ccm_compat)
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{
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struct device_node *np;
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u32 val;
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np = of_find_compatible_node(NULL, NULL, ccm_compat);
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ccm_base = of_iomap(np, 0);
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BUG_ON(!ccm_base);
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/*
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* Initialize CCM_CLPCR_LPM into RUN mode to avoid ARM core
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* clock being shut down unexpectedly by WAIT mode.
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*/
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val = readl_relaxed(ccm_base + CLPCR);
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val &= ~BM_CLPCR_LPM;
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writel_relaxed(val, ccm_base + CLPCR);
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}
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void __init imx6q_pm_init(void)
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{
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imx6_pm_common_init(&imx6q_pm_data);
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