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mmc: tegra: Write xfer_mode, CMD regs in together
If there is a gap between xfer mode and command register writes, tegra SDMMC controller can sometimes issue a spurious command before the CMD register is written. To avoid this, these two registers need to be written together in a single write operation. This is implemented as an NVQUIRK as it applies to T114, T124 and T132. Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com> Signed-off-by: Rhyland Klein <rklein@nvidia.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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@ -41,6 +41,7 @@
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#define NVQUIRK_DISABLE_SDR50 BIT(3)
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#define NVQUIRK_DISABLE_SDR104 BIT(4)
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#define NVQUIRK_DISABLE_DDR50 BIT(5)
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#define NVQUIRK_SHADOW_XFER_MODE_REG BIT(6)
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struct sdhci_tegra_soc_data {
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const struct sdhci_pltfm_data *pdata;
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@ -67,6 +68,31 @@ static u16 tegra_sdhci_readw(struct sdhci_host *host, int reg)
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return readw(host->ioaddr + reg);
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}
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static void tegra_sdhci_writew(struct sdhci_host *host, u16 val, int reg)
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{
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struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
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struct sdhci_tegra *tegra_host = pltfm_host->priv;
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const struct sdhci_tegra_soc_data *soc_data = tegra_host->soc_data;
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if (soc_data->nvquirks & NVQUIRK_SHADOW_XFER_MODE_REG) {
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switch (reg) {
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case SDHCI_TRANSFER_MODE:
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/*
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* Postpone this write, we must do it together with a
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* command write that is down below.
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*/
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pltfm_host->xfer_mode_shadow = val;
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return;
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case SDHCI_COMMAND:
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writel((val << 16) | pltfm_host->xfer_mode_shadow,
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host->ioaddr + SDHCI_TRANSFER_MODE);
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return;
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}
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}
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writew(val, host->ioaddr + reg);
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}
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static void tegra_sdhci_writel(struct sdhci_host *host, u32 val, int reg)
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{
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struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
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@ -147,6 +173,7 @@ static void tegra_sdhci_set_bus_width(struct sdhci_host *host, int bus_width)
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static const struct sdhci_ops tegra_sdhci_ops = {
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.get_ro = tegra_sdhci_get_ro,
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.read_w = tegra_sdhci_readw,
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.write_w = tegra_sdhci_writew,
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.write_l = tegra_sdhci_writel,
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.set_clock = sdhci_set_clock,
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.set_bus_width = tegra_sdhci_set_bus_width,
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@ -201,7 +228,8 @@ static struct sdhci_tegra_soc_data soc_data_tegra114 = {
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.pdata = &sdhci_tegra114_pdata,
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.nvquirks = NVQUIRK_DISABLE_SDR50 |
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NVQUIRK_DISABLE_DDR50 |
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NVQUIRK_DISABLE_SDR104,
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NVQUIRK_DISABLE_SDR104 |
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NVQUIRK_SHADOW_XFER_MODE_REG,
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};
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static const struct of_device_id sdhci_tegra_dt_match[] = {
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