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ARM: dts: vexpress: disable CA9 core tile sp804 timer

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The motherboard sp804 timer is used, but core tile sp804 timer is not.
According to Russell King, the clock configuration is undocumented and
defaults to 32kHz which is not desireable. So mark core tile sp804 timer
as disabled.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
This commit is contained in:
Rob Herring 2013-02-06 21:15:09 -06:00
parent dabfd8fb84
commit 34c2e5feeb
1 changed files with 1 additions and 0 deletions
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arch/arm/boot/dts/vexpress-v2p-ca9.dts
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@ -98,6 +98,7 @@
<0 49 4>;
clocks = <&oscclk2>, <&oscclk2>;
clock-names = "timclk", "apb_pclk";
status = "disabled";
};
watchdog@100e5000 {