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net/mlx5: Lag, expose number of lag ports
Downstream patches will add support for hardware lag with more than 2 ports. Add a way for users to query the number of lag ports. Signed-off-by: Mark Bloch <mbloch@nvidia.com> Reviewed-by: Maor Gottlieb <maorg@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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@ -100,7 +100,7 @@ int mlx5_ib_create_gsi(struct ib_pd *pd, struct mlx5_ib_qp *mqp,
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port_type) == MLX5_CAP_PORT_TYPE_IB)
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num_qps = pd->device->attrs.max_pkeys;
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else if (dev->lag_active)
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num_qps = MLX5_MAX_PORTS;
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num_qps = dev->lag_ports;
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}
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gsi = &mqp->gsi;
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@ -2991,6 +2991,7 @@ static int mlx5_eth_lag_init(struct mlx5_ib_dev *dev)
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}
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dev->flow_db->lag_demux_ft = ft;
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dev->lag_ports = mlx5_lag_get_num_ports(mdev);
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dev->lag_active = true;
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return 0;
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@ -1131,6 +1131,7 @@ struct mlx5_ib_dev {
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struct xarray sig_mrs;
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struct mlx5_port_caps port_caps[MLX5_MAX_PORTS];
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u16 pkey_table_len;
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u8 lag_ports;
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};
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static inline struct mlx5_ib_cq *to_mibcq(struct mlx5_core_cq *mcq)
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@ -3907,7 +3907,7 @@ static unsigned int get_tx_affinity_rr(struct mlx5_ib_dev *dev,
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tx_port_affinity = &dev->port[port_num].roce.tx_port_affinity;
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return (unsigned int)atomic_add_return(1, tx_port_affinity) %
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MLX5_MAX_PORTS + 1;
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(dev->lag_active ? dev->lag_ports : MLX5_CAP_GEN(dev->mdev, num_lag_ports)) + 1;
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}
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static bool qp_supports_affinity(struct mlx5_ib_qp *qp)
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@ -1185,6 +1185,12 @@ unlock:
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}
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EXPORT_SYMBOL(mlx5_lag_get_slave_port);
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u8 mlx5_lag_get_num_ports(struct mlx5_core_dev *dev)
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{
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return MLX5_MAX_PORTS;
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}
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EXPORT_SYMBOL(mlx5_lag_get_num_ports);
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struct mlx5_core_dev *mlx5_lag_get_peer_mdev(struct mlx5_core_dev *dev)
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{
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struct mlx5_core_dev *peer_dev = NULL;
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@ -1142,6 +1142,7 @@ int mlx5_lag_query_cong_counters(struct mlx5_core_dev *dev,
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int num_counters,
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size_t *offsets);
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struct mlx5_core_dev *mlx5_lag_get_peer_mdev(struct mlx5_core_dev *dev);
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u8 mlx5_lag_get_num_ports(struct mlx5_core_dev *dev);
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struct mlx5_uars_page *mlx5_get_uars_page(struct mlx5_core_dev *mdev);
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void mlx5_put_uars_page(struct mlx5_core_dev *mdev, struct mlx5_uars_page *up);
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int mlx5_dm_sw_icm_alloc(struct mlx5_core_dev *dev, enum mlx5_sw_icm_type type,
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