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KVM/riscv changes for 6.3

Browse Source 
- Fix wrong usage of PGDIR_SIZE to check page sizes
 - Fix privilege mode setting in kvm_riscv_vcpu_trap_redirect()
 - Redirect illegal instruction traps to guest
 - SBI PMU support for guest
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Merge tag 'kvm-riscv-6.3-1' of https://github.com/kvm-riscv/linux into HEAD

KVM/riscv changes for 6.3

- Fix wrong usage of PGDIR_SIZE to check page sizes
- Fix privilege mode setting in kvm_riscv_vcpu_trap_redirect()
- Redirect illegal instruction traps to guest
- SBI PMU support for guest
This commit is contained in:
Paolo Bonzini 2023-02-15 12:33:28 -05:00
commit 33436335e9
1207 changed files with 12931 additions and 8301 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
.mailmap
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@ -130,6 +130,7 @@ Domen Puncer <domen@coderock.org>
Douglas Gilbert <dougg@torque.net> Douglas Gilbert <dougg@torque.net>
Ed L. Cashin <ecashin@coraid.com> Ed L. Cashin <ecashin@coraid.com>
Erik Kaneda <erik.kaneda@intel.com> <erik.schmauss@intel.com> Erik Kaneda <erik.kaneda@intel.com> <erik.schmauss@intel.com>
Eugen Hristev <eugen.hristev@collabora.com> <eugen.hristev@microchip.com>
Evgeniy Polyakov <johnpol@2ka.mipt.ru> Evgeniy Polyakov <johnpol@2ka.mipt.ru>
Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> <ezequiel@collabora.com> Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> <ezequiel@collabora.com>
Felipe W Damasio <felipewd@terra.com.br> Felipe W Damasio <felipewd@terra.com.br>
@ -214,6 +215,7 @@ Jisheng Zhang <jszhang@kernel.org> <jszhang@marvell.com>
Jisheng Zhang <jszhang@kernel.org> <Jisheng.Zhang@synaptics.com> Jisheng Zhang <jszhang@kernel.org> <Jisheng.Zhang@synaptics.com>
Johan Hovold <johan@kernel.org> <jhovold@gmail.com> Johan Hovold <johan@kernel.org> <jhovold@gmail.com>
Johan Hovold <johan@kernel.org> <johan@hovoldconsulting.com> Johan Hovold <johan@kernel.org> <johan@hovoldconsulting.com>
John Crispin <john@phrozen.org> <blogic@openwrt.org>
John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de> John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de>
John Stultz <johnstul@us.ibm.com> John Stultz <johnstul@us.ibm.com>
Jordan Crouse <jordan@cosmicpenguin.net> <jcrouse@codeaurora.org> Jordan Crouse <jordan@cosmicpenguin.net> <jcrouse@codeaurora.org>
@ -371,6 +373,7 @@ Rémi Denis-Courmont <rdenis@simphalempin.com>
Ricardo Ribalda <ribalda@kernel.org> <ricardo@ribalda.com> Ricardo Ribalda <ribalda@kernel.org> <ricardo@ribalda.com>
Ricardo Ribalda <ribalda@kernel.org> Ricardo Ribalda Delgado <ribalda@kernel.org> Ricardo Ribalda <ribalda@kernel.org> Ricardo Ribalda Delgado <ribalda@kernel.org>
Ricardo Ribalda <ribalda@kernel.org> <ricardo.ribalda@gmail.com> Ricardo Ribalda <ribalda@kernel.org> <ricardo.ribalda@gmail.com>
Robert Foss <rfoss@kernel.org> <robert.foss@linaro.org>
Roman Gushchin <roman.gushchin@linux.dev> <guro@fb.com> Roman Gushchin <roman.gushchin@linux.dev> <guro@fb.com>
Roman Gushchin <roman.gushchin@linux.dev> <guroan@gmail.com> Roman Gushchin <roman.gushchin@linux.dev> <guroan@gmail.com>
Roman Gushchin <roman.gushchin@linux.dev> <klamm@yandex-team.ru> Roman Gushchin <roman.gushchin@linux.dev> <klamm@yandex-team.ru>
@ -422,6 +425,7 @@ Tony Luck <tony.luck@intel.com>
TripleX Chung <xxx.phy@gmail.com> <triplex@zh-kernel.org> TripleX Chung <xxx.phy@gmail.com> <triplex@zh-kernel.org>
TripleX Chung <xxx.phy@gmail.com> <zhongyu@18mail.cn> TripleX Chung <xxx.phy@gmail.com> <zhongyu@18mail.cn>
Tsuneo Yoshioka <Tsuneo.Yoshioka@f-secure.com> Tsuneo Yoshioka <Tsuneo.Yoshioka@f-secure.com>
Tudor Ambarus <tudor.ambarus@linaro.org> <tudor.ambarus@microchip.com>
Tycho Andersen <tycho@tycho.pizza> <tycho@tycho.ws> Tycho Andersen <tycho@tycho.pizza> <tycho@tycho.ws>
Tzung-Bi Shih <tzungbi@kernel.org> <tzungbi@google.com> Tzung-Bi Shih <tzungbi@kernel.org> <tzungbi@google.com>
Uwe Kleine-König <ukleinek@informatik.uni-freiburg.de> Uwe Kleine-König <ukleinek@informatik.uni-freiburg.de>

15
CREDITS
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@ -1173,6 +1173,10 @@ D: Future Domain TMC-16x0 SCSI driver (author)
D: APM driver (early port) D: APM driver (early port)
D: DRM drivers (author of several) D: DRM drivers (author of several)
N: Veaceslav Falico
E: vfalico@gmail.com
D: Co-maintainer and co-author of the network bonding driver.
N: János Farkas N: János Farkas
E: chexum@shadow.banki.hu E: chexum@shadow.banki.hu
D: romfs, various (mostly networking) fixes D: romfs, various (mostly networking) fixes
@ -2489,6 +2493,13 @@ D: XF86_Mach8
D: XF86_8514 D: XF86_8514
D: cfdisk (curses based disk partitioning program) D: cfdisk (curses based disk partitioning program)
N: Mat Martineau
E: mat@martineau.name
D: MPTCP subsystem co-maintainer 2020-2023
D: Keyctl restricted keyring and Diffie-Hellman UAPI
D: Bluetooth L2CAP ERTM mode and AMP
S: USA
N: John S. Marvin N: John S. Marvin
E: jsm@fc.hp.com E: jsm@fc.hp.com
D: PA-RISC port D: PA-RISC port
@ -4172,6 +4183,10 @@ S: B-1206 Jingmao Guojigongyu
S: 16 Baliqiao Nanjie, Beijing 101100 S: 16 Baliqiao Nanjie, Beijing 101100
S: People's Repulic of China S: People's Repulic of China
N: Vlad Yasevich
E: vyasevich@gmail.com
D: SCTP protocol maintainer.
N: Aviad Yehezkel N: Aviad Yehezkel
E: aviadye@nvidia.com E: aviadye@nvidia.com
D: Kernel TLS implementation and offload support. D: Kernel TLS implementation and offload support.

15
Documentation/admin-guide/cgroup-v2.rst
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@ -1245,13 +1245,17 @@ PAGE_SIZE multiple when read back.
This is a simple interface to trigger memory reclaim in the This is a simple interface to trigger memory reclaim in the
target cgroup. target cgroup.
This file accepts a string which contains the number of bytes to This file accepts a single key, the number of bytes to reclaim.
reclaim. No nested keys are currently supported.
Example:: Example::
echo "1G" > memory.reclaim echo "1G" > memory.reclaim
The interface can be later extended with nested keys to
configure the reclaim behavior. For example, specify the
type of memory to reclaim from (anon, file, ..).
Please note that the kernel can over or under reclaim from Please note that the kernel can over or under reclaim from
the target cgroup. If less bytes are reclaimed than the the target cgroup. If less bytes are reclaimed than the
specified amount, -EAGAIN is returned. specified amount, -EAGAIN is returned.
@ -1263,13 +1267,6 @@ PAGE_SIZE multiple when read back.
This means that the networking layer will not adapt based on This means that the networking layer will not adapt based on
reclaim induced by memory.reclaim. reclaim induced by memory.reclaim.
This file also allows the user to specify the nodes to reclaim from,
via the 'nodes=' key, for example::
echo "1G nodes=0,1" > memory.reclaim
The above instructs the kernel to reclaim memory from nodes 0,1.
memory.peak memory.peak
A read-only single value file which exists on non-root A read-only single value file which exists on non-root
cgroups. cgroups.

4
Documentation/admin-guide/mm/zswap.rst
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@ -70,9 +70,7 @@ e.g. ``zswap.zpool=zbud``. It can also be changed at runtime using the sysfs
The zbud type zpool allocates exactly 1 page to store 2 compressed pages, which The zbud type zpool allocates exactly 1 page to store 2 compressed pages, which
means the compression ratio will always be 2:1 or worse (because of half-full means the compression ratio will always be 2:1 or worse (because of half-full
zbud pages). The zsmalloc type zpool has a more complex compressed page zbud pages). The zsmalloc type zpool has a more complex compressed page
storage method, and it can achieve greater storage densities. However, storage method, and it can achieve greater storage densities.
zsmalloc does not implement compressed page eviction, so once zswap fills it
cannot evict the oldest page, it can only reject new pages.
When a swap page is passed from frontswap to zswap, zswap maintains a mapping When a swap page is passed from frontswap to zswap, zswap maintains a mapping
of the swap entry, a combination of the swap type and swap offset, to the zpool of the swap entry, a combination of the swap type and swap offset, to the zpool

2
Documentation/arm64/silicon-errata.rst
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@ -120,6 +120,8 @@ stable kernels.
+----------------+-----------------+-----------------+-----------------------------+ +----------------+-----------------+-----------------+-----------------------------+
| ARM | Cortex-A710 | #2224489 | ARM64_ERRATUM_2224489 | | ARM | Cortex-A710 | #2224489 | ARM64_ERRATUM_2224489 |
+----------------+-----------------+-----------------+-----------------------------+ +----------------+-----------------+-----------------+-----------------------------+
| ARM | Cortex-A715 | #2645198 | ARM64_ERRATUM_2645198 |
+----------------+-----------------+-----------------+-----------------------------+
| ARM | Cortex-X2 | #2119858 | ARM64_ERRATUM_2119858 | | ARM | Cortex-X2 | #2119858 | ARM64_ERRATUM_2119858 |
+----------------+-----------------+-----------------+-----------------------------+ +----------------+-----------------+-----------------+-----------------------------+
| ARM | Cortex-X2 | #2224489 | ARM64_ERRATUM_2224489 | | ARM | Cortex-X2 | #2224489 | ARM64_ERRATUM_2224489 |

12
Documentation/conf.py
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@ -31,6 +31,12 @@ def have_command(cmd):
# Get Sphinx version # Get Sphinx version
major, minor, patch = sphinx.version_info[:3] major, minor, patch = sphinx.version_info[:3]
#
# Warn about older versions that we don't want to support for much
# longer.
#
if (major < 2) or (major == 2 and minor < 4):
print('WARNING: support for Sphinx < 2.4 will be removed soon.')
# If extensions (or modules to document with autodoc) are in another directory, # If extensions (or modules to document with autodoc) are in another directory,
# add these directories to sys.path here. If the directory is relative to the # add these directories to sys.path here. If the directory is relative to the
@ -339,7 +345,11 @@ html_use_smartypants = False
# Custom sidebar templates, maps document names to template names. # Custom sidebar templates, maps document names to template names.
# Note that the RTD theme ignores this # Note that the RTD theme ignores this
html_sidebars = { '**': ["about.html", 'searchbox.html', 'localtoc.html', 'sourcelink.html']} html_sidebars = { '**': ['searchbox.html', 'localtoc.html', 'sourcelink.html']}
# about.html is available for alabaster theme. Add it at the front.
if html_theme == 'alabaster':
html_sidebars['**'].insert(0, 'about.html')
# Output file base name for HTML help builder. # Output file base name for HTML help builder.
htmlhelp_basename = 'TheLinuxKerneldoc' htmlhelp_basename = 'TheLinuxKerneldoc'

11
Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml
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@ -54,6 +54,17 @@ properties:
- const: xo - const: xo
- const: alternate - const: alternate
interrupts:
minItems: 1
maxItems: 3
interrupt-names:
minItems: 1
items:
- const: dcvsh-irq-0
- const: dcvsh-irq-1
- const: dcvsh-irq-2
'#freq-domain-cells': '#freq-domain-cells':
const: 1 const: 1

2
Documentation/devicetree/bindings/crypto/atmel,at91sam9g46-aes.yaml
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@ -8,7 +8,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Atmel Advanced Encryption Standard (AES) HW cryptographic accelerator title: Atmel Advanced Encryption Standard (AES) HW cryptographic accelerator
maintainers: maintainers:
- Tudor Ambarus <tudor.ambarus@microchip.com> - Tudor Ambarus <tudor.ambarus@linaro.org>
properties: properties:
compatible: compatible:

2
Documentation/devicetree/bindings/crypto/atmel,at91sam9g46-sha.yaml
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@ -8,7 +8,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Atmel Secure Hash Algorithm (SHA) HW cryptographic accelerator title: Atmel Secure Hash Algorithm (SHA) HW cryptographic accelerator
maintainers: maintainers:
- Tudor Ambarus <tudor.ambarus@microchip.com> - Tudor Ambarus <tudor.ambarus@linaro.org>
properties: properties:
compatible: compatible:

2
Documentation/devicetree/bindings/crypto/atmel,at91sam9g46-tdes.yaml
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@ -8,7 +8,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Atmel Triple Data Encryption Standard (TDES) HW cryptographic accelerator title: Atmel Triple Data Encryption Standard (TDES) HW cryptographic accelerator
maintainers: maintainers:
- Tudor Ambarus <tudor.ambarus@microchip.com> - Tudor Ambarus <tudor.ambarus@linaro.org>
properties: properties:
compatible: compatible:

4
Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml
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@ -32,7 +32,7 @@ properties:
- description: Display byte clock - description: Display byte clock
- description: Display byte interface clock - description: Display byte interface clock
- description: Display pixel clock - description: Display pixel clock
- description: Display escape clock - description: Display core clock
- description: Display AHB clock - description: Display AHB clock
- description: Display AXI clock - description: Display AXI clock
@ -137,8 +137,6 @@ required:
- phys - phys
- assigned-clocks - assigned-clocks
- assigned-clock-parents - assigned-clock-parents
- power-domains
- operating-points-v2
- ports - ports
additionalProperties: false additionalProperties: false

1
Documentation/devicetree/bindings/display/msm/dsi-phy-10nm.yaml
View File

@ -69,7 +69,6 @@ required:
- compatible - compatible
- reg - reg
- reg-names - reg-names
- vdds-supply
unevaluatedProperties: false unevaluatedProperties: false

1
Documentation/devicetree/bindings/display/msm/dsi-phy-14nm.yaml
View File

@ -39,7 +39,6 @@ required:
- compatible - compatible
- reg - reg
- reg-names - reg-names
- vcca-supply
unevaluatedProperties: false unevaluatedProperties: false

4
Documentation/devicetree/bindings/display/msm/dsi-phy-28nm.yaml
View File

@ -34,6 +34,10 @@ properties:
vddio-supply: vddio-supply:
description: Phandle to vdd-io regulator device node. description: Phandle to vdd-io regulator device node.
qcom,dsi-phy-regulator-ldo-mode:
type: boolean
description: Indicates if the LDO mode PHY regulator is wanted.
required: required:
- compatible - compatible
- reg - reg

2
Documentation/devicetree/bindings/display/msm/qcom,qcm2290-mdss.yaml
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@ -72,7 +72,7 @@ examples:
#include <dt-bindings/interconnect/qcom,qcm2290.h> #include <dt-bindings/interconnect/qcom,qcm2290.h>
#include <dt-bindings/power/qcom-rpmpd.h> #include <dt-bindings/power/qcom-rpmpd.h>
mdss@5e00000 { display-subsystem@5e00000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
compatible = "qcom,qcm2290-mdss"; compatible = "qcom,qcm2290-mdss";

2
Documentation/devicetree/bindings/display/msm/qcom,sm6115-mdss.yaml
View File

@ -62,7 +62,7 @@ examples:
#include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/power/qcom-rpmpd.h> #include <dt-bindings/power/qcom-rpmpd.h>
mdss@5e00000 { display-subsystem@5e00000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
compatible = "qcom,sm6115-mdss"; compatible = "qcom,sm6115-mdss";

4
Documentation/devicetree/bindings/i2c/renesas,rzv2m.yaml
View File

@ -16,7 +16,7 @@ properties:
compatible: compatible:
items: items:
- enum: - enum:
- renesas,i2c-r9a09g011 # RZ/V2M - renesas,r9a09g011-i2c # RZ/V2M
- const: renesas,rzv2m-i2c - const: renesas,rzv2m-i2c
reg: reg:
@ -66,7 +66,7 @@ examples:
#include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/arm-gic.h>
i2c0: i2c@a4030000 { i2c0: i2c@a4030000 {
compatible = "renesas,i2c-r9a09g011", "renesas,rzv2m-i2c"; compatible = "renesas,r9a09g011-i2c", "renesas,rzv2m-i2c";
reg = <0xa4030000 0x80>; reg = <0xa4030000 0x80>;
interrupts = <GIC_SPI 232 IRQ_TYPE_EDGE_RISING>, interrupts = <GIC_SPI 232 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 236 IRQ_TYPE_EDGE_RISING>; <GIC_SPI 236 IRQ_TYPE_EDGE_RISING>;

24
Documentation/devicetree/bindings/interconnect/qcom,rpm.yaml
View File

@ -84,7 +84,6 @@ allOf:
- qcom,msm8939-pcnoc - qcom,msm8939-pcnoc
- qcom,msm8939-snoc - qcom,msm8939-snoc
- qcom,msm8996-a1noc - qcom,msm8996-a1noc
- qcom,msm8996-a2noc
- qcom,msm8996-bimc - qcom,msm8996-bimc
- qcom,msm8996-cnoc - qcom,msm8996-cnoc
- qcom,msm8996-pnoc - qcom,msm8996-pnoc
@ -186,6 +185,29 @@ allOf:
required: required:
- power-domains - power-domains
- if:
properties:
compatible:
contains:
enum:
- qcom,msm8996-a2noc
then:
properties:
clock-names:
items:
- const: bus
- const: bus_a
- const: aggre2_ufs_axi
- const: ufs_axi
clocks:
items:
- description: Bus Clock
- description: Bus A Clock
- description: Aggregate2 NoC UFS AXI Clock
- description: UFS AXI Clock
- if: - if:
properties: properties:
compatible: compatible:

8
Documentation/devicetree/bindings/phy/amlogic,meson-g12a-usb2-phy.yaml → Documentation/devicetree/bindings/phy/amlogic,g12a-usb2-phy.yaml
View File

@ -2,7 +2,7 @@
# Copyright 2019 BayLibre, SAS # Copyright 2019 BayLibre, SAS
%YAML 1.2 %YAML 1.2
--- ---
$id: "http://devicetree.org/schemas/phy/amlogic,meson-g12a-usb2-phy.yaml#" $id: "http://devicetree.org/schemas/phy/amlogic,g12a-usb2-phy.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#" $schema: "http://devicetree.org/meta-schemas/core.yaml#"
title: Amlogic G12A USB2 PHY title: Amlogic G12A USB2 PHY
@ -13,8 +13,8 @@ maintainers:
properties: properties:
compatible: compatible:
enum: enum:
- amlogic,meson-g12a-usb2-phy - amlogic,g12a-usb2-phy
- amlogic,meson-a1-usb2-phy - amlogic,a1-usb2-phy
reg: reg:
maxItems: 1 maxItems: 1
@ -68,7 +68,7 @@ additionalProperties: false
examples: examples:
- | - |
phy@36000 { phy@36000 {
compatible = "amlogic,meson-g12a-usb2-phy"; compatible = "amlogic,g12a-usb2-phy";
reg = <0x36000 0x2000>; reg = <0x36000 0x2000>;
clocks = <&xtal>; clocks = <&xtal>;
clock-names = "xtal"; clock-names = "xtal";

6
Documentation/devicetree/bindings/phy/amlogic,meson-g12a-usb3-pcie-phy.yaml → Documentation/devicetree/bindings/phy/amlogic,g12a-usb3-pcie-phy.yaml
View File

@ -2,7 +2,7 @@
# Copyright 2019 BayLibre, SAS # Copyright 2019 BayLibre, SAS
%YAML 1.2 %YAML 1.2
--- ---
$id: "http://devicetree.org/schemas/phy/amlogic,meson-g12a-usb3-pcie-phy.yaml#" $id: "http://devicetree.org/schemas/phy/amlogic,g12a-usb3-pcie-phy.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#" $schema: "http://devicetree.org/meta-schemas/core.yaml#"
title: Amlogic G12A USB3 + PCIE Combo PHY title: Amlogic G12A USB3 + PCIE Combo PHY
@ -13,7 +13,7 @@ maintainers:
properties: properties:
compatible: compatible:
enum: enum:
- amlogic,meson-g12a-usb3-pcie-phy - amlogic,g12a-usb3-pcie-phy
reg: reg:
maxItems: 1 maxItems: 1
@ -49,7 +49,7 @@ additionalProperties: false
examples: examples:
- | - |
phy@46000 { phy@46000 {
compatible = "amlogic,meson-g12a-usb3-pcie-phy"; compatible = "amlogic,g12a-usb3-pcie-phy";
reg = <0x46000 0x2000>; reg = <0x46000 0x2000>;
clocks = <&ref_clk>; clocks = <&ref_clk>;
clock-names = "ref_clk"; clock-names = "ref_clk";

1
Documentation/devicetree/bindings/phy/qcom,usb-hs-28nm.yaml
View File

@ -16,7 +16,6 @@ properties:
compatible: compatible:
enum: enum:
- qcom,usb-hs-28nm-femtophy - qcom,usb-hs-28nm-femtophy
- qcom,usb-hs-28nm-mdm9607
reg: reg:
maxItems: 1 maxItems: 1

21
Documentation/devicetree/bindings/regulator/samsung,s2mps14.yaml
View File

@ -19,8 +19,8 @@ description: |
additional information and example. additional information and example.
patternProperties: patternProperties:
# 25 LDOs # 25 LDOs, without LDO10-12
"^LDO([1-9]|[1][0-9]|2[0-5])$": "^LDO([1-9]|1[3-9]|2[0-5])$":
type: object type: object
$ref: regulator.yaml# $ref: regulator.yaml#
unevaluatedProperties: false unevaluatedProperties: false
@ -30,6 +30,23 @@ patternProperties:
required: required:
- regulator-name - regulator-name
"^LDO(1[0-2])$":
type: object
$ref: regulator.yaml#
unevaluatedProperties: false
description:
Properties for single LDO regulator.
properties:
samsung,ext-control-gpios:
maxItems: 1
description:
LDO10, LDO11 and LDO12 can be configured to external control over
GPIO.
required:
- regulator-name
# 5 bucks # 5 bucks
"^BUCK[1-5]$": "^BUCK[1-5]$":
type: object type: object

2
Documentation/devicetree/bindings/riscv/cpus.yaml
View File

@ -83,7 +83,7 @@ properties:
insensitive, letters in the riscv,isa string must be all insensitive, letters in the riscv,isa string must be all
lowercase to simplify parsing. lowercase to simplify parsing.
$ref: "/schemas/types.yaml#/definitions/string" $ref: "/schemas/types.yaml#/definitions/string"
pattern: ^rv(?:64|32)imaf?d?q?c?b?v?k?h?(?:_[hsxz](?:[a-z])+)*$ pattern: ^rv(?:64|32)imaf?d?q?c?b?k?j?p?v?h?(?:[hsxz](?:[a-z])+)?(?:_[hsxz](?:[a-z])+)*$
# RISC-V requires 'timebase-frequency' in /cpus, so disallow it here # RISC-V requires 'timebase-frequency' in /cpus, so disallow it here
timebase-frequency: false timebase-frequency: false

2
Documentation/devicetree/bindings/rtc/qcom-pm8xxx-rtc.yaml
View File

@ -40,6 +40,8 @@ properties:
description: description:
Indicates that the setting of RTC time is allowed by the host CPU. Indicates that the setting of RTC time is allowed by the host CPU.
wakeup-source: true
required: required:
- compatible - compatible
- reg - reg

5
Documentation/devicetree/bindings/soc/qcom/qcom,apr-services.yaml
View File

@ -39,8 +39,8 @@ properties:
qcom,protection-domain: qcom,protection-domain:
$ref: /schemas/types.yaml#/definitions/string-array $ref: /schemas/types.yaml#/definitions/string-array
description: | description: |
Protection domain service name and path for APR service Protection domain service name and path for APR service (if supported).
possible values are:: Possible values are::
"avs/audio", "msm/adsp/audio_pd". "avs/audio", "msm/adsp/audio_pd".
"kernel/elf_loader", "msm/modem/wlan_pd". "kernel/elf_loader", "msm/modem/wlan_pd".
"tms/servreg", "msm/adsp/audio_pd". "tms/servreg", "msm/adsp/audio_pd".
@ -49,6 +49,5 @@ properties:
required: required:
- reg - reg
- qcom,protection-domain
additionalProperties: true additionalProperties: true

0
Documentation/devicetree/bindings/sound/everest,es8326.yaml Executable file → Normal file
View File

1
Documentation/devicetree/bindings/sound/mt8186-mt6366-rt1019-rt5682s.yaml
View File

@ -16,6 +16,7 @@ properties:
compatible: compatible:
enum: enum:
- mediatek,mt8186-mt6366-rt1019-rt5682s-sound - mediatek,mt8186-mt6366-rt1019-rt5682s-sound
- mediatek,mt8186-mt6366-rt5682s-max98360-sound
mediatek,platform: mediatek,platform:
$ref: "/schemas/types.yaml#/definitions/phandle" $ref: "/schemas/types.yaml#/definitions/phandle"

4
Documentation/devicetree/bindings/sound/qcom,lpass-tx-macro.yaml
View File

@ -30,7 +30,9 @@ properties:
const: 0 const: 0
clocks: clocks:
maxItems: 5 oneOf:
- maxItems: 3
- maxItems: 5
clock-names: clock-names:
oneOf: oneOf:

58
Documentation/devicetree/bindings/sound/qcom,lpass-wsa-macro.yaml
View File

@ -9,9 +9,6 @@ title: LPASS(Low Power Audio Subsystem) VA Macro audio codec
maintainers: maintainers:
- Srinivas Kandagatla <srinivas.kandagatla@linaro.org> - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
allOf:
- $ref: dai-common.yaml#
properties: properties:
compatible: compatible:
enum: enum:
@ -30,15 +27,12 @@ properties:
const: 0 const: 0
clocks: clocks:
maxItems: 5 minItems: 5
maxItems: 6
clock-names: clock-names:
items: minItems: 5
- const: mclk maxItems: 6
- const: npl
- const: macro
- const: dcodec
- const: fsgen
clock-output-names: clock-output-names:
maxItems: 1 maxItems: 1
@ -55,10 +49,51 @@ required:
- reg - reg
- "#sound-dai-cells" - "#sound-dai-cells"
allOf:
- $ref: dai-common.yaml#
- if:
properties:
compatible:
enum:
- qcom,sc7280-lpass-wsa-macro
- qcom,sm8450-lpass-wsa-macro
- qcom,sc8280xp-lpass-wsa-macro
then:
properties:
clocks:
maxItems: 5
clock-names:
items:
- const: mclk
- const: npl
- const: macro
- const: dcodec
- const: fsgen
- if:
properties:
compatible:
enum:
- qcom,sm8250-lpass-wsa-macro
then:
properties:
clocks:
minItems: 6
clock-names:
items:
- const: mclk
- const: npl
- const: macro
- const: dcodec
- const: va
- const: fsgen
unevaluatedProperties: false unevaluatedProperties: false
examples: examples:
- | - |
#include <dt-bindings/clock/qcom,sm8250-lpass-aoncc.h>
#include <dt-bindings/sound/qcom,q6afe.h> #include <dt-bindings/sound/qcom,q6afe.h>
codec@3240000 { codec@3240000 {
compatible = "qcom,sm8250-lpass-wsa-macro"; compatible = "qcom,sm8250-lpass-wsa-macro";
@ -69,7 +104,8 @@ examples:
<&audiocc 0>, <&audiocc 0>,
<&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
<&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
<&aoncc LPASS_CDC_VA_MCLK>,
<&vamacro>; <&vamacro>;
clock-names = "mclk", "npl", "macro", "dcodec", "fsgen"; clock-names = "mclk", "npl", "macro", "dcodec", "va", "fsgen";
clock-output-names = "mclk"; clock-output-names = "mclk";
}; };

2
Documentation/devicetree/bindings/spi/atmel,at91rm9200-spi.yaml
View File

@ -8,7 +8,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Atmel SPI device title: Atmel SPI device
maintainers: maintainers:
- Tudor Ambarus <tudor.ambarus@microchip.com> - Tudor Ambarus <tudor.ambarus@linaro.org>
allOf: allOf:
- $ref: spi-controller.yaml# - $ref: spi-controller.yaml#

2
Documentation/devicetree/bindings/spi/atmel,quadspi.yaml
View File

@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Atmel Quad Serial Peripheral Interface (QSPI) title: Atmel Quad Serial Peripheral Interface (QSPI)
maintainers: maintainers:
- Tudor Ambarus <tudor.ambarus@microchip.com> - Tudor Ambarus <tudor.ambarus@linaro.org>
allOf: allOf:
- $ref: spi-controller.yaml# - $ref: spi-controller.yaml#

4
Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml
View File

@ -44,9 +44,9 @@ properties:
description: description:
Maximum SPI clocking speed of the device in Hz. Maximum SPI clocking speed of the device in Hz.
spi-cs-setup-ns: spi-cs-setup-delay-ns:
description: description:
Delay in nanosecods to be introduced by the controller after CS is Delay in nanoseconds to be introduced by the controller after CS is
asserted. asserted.
spi-rx-bus-width: spi-rx-bus-width:

2
Documentation/filesystems/erofs.rst
View File

@ -120,6 +120,8 @@ dax={always,never} Use direct access (no page cache). See
dax A legacy option which is an alias for ``dax=always``. dax A legacy option which is an alias for ``dax=always``.
device=%s Specify a path to an extra device to be used together. device=%s Specify a path to an extra device to be used together.
fsid=%s Specify a filesystem image ID for Fscache back-end. fsid=%s Specify a filesystem image ID for Fscache back-end.
domain_id=%s Specify a domain ID in fscache mode so that different images
with the same blobs under a given domain ID can share storage.
=================== ========================================================= =================== =========================================================
Sysfs Entries Sysfs Entries

2
Documentation/kbuild/makefiles.rst
View File

@ -1042,7 +1042,7 @@ $(clean-files).
When executing "make clean", the file "crc32table.h" will be deleted. When executing "make clean", the file "crc32table.h" will be deleted.
Kbuild will assume files to be in the same relative directory as the Kbuild will assume files to be in the same relative directory as the
Makefile, except if prefixed with $(objtree). Makefile.
To exclude certain files or directories from make clean, use the To exclude certain files or directories from make clean, use the
$(no-clean-files) variable. $(no-clean-files) variable.

2
Documentation/networking/bridge.rst
View File

@ -8,7 +8,7 @@ In order to use the Ethernet bridging functionality, you'll need the
userspace tools. userspace tools.
Documentation for Linux bridging is on: Documentation for Linux bridging is on:
http://www.linuxfoundation.org/collaborate/workgroups/networking/bridge https://wiki.linuxfoundation.org/networking/bridge
The bridge-utilities are maintained at: The bridge-utilities are maintained at:
git://git.kernel.org/pub/scm/linux/kernel/git/shemminger/bridge-utils.git git://git.kernel.org/pub/scm/linux/kernel/git/shemminger/bridge-utils.git

2
Documentation/networking/device_drivers/ethernet/intel/ice.rst
View File

@ -819,7 +819,7 @@ NAPI
---- ----
This driver supports NAPI (Rx polling mode). This driver supports NAPI (Rx polling mode).
For more information on NAPI, see For more information on NAPI, see
https://www.linuxfoundation.org/collaborate/workgroups/networking/napi https://wiki.linuxfoundation.org/networking/napi
MACVLAN MACVLAN

10
Documentation/networking/nf_conntrack-sysctl.rst
View File

@ -173,7 +173,9 @@ nf_conntrack_sctp_timeout_cookie_echoed - INTEGER (seconds)
default 3 default 3
nf_conntrack_sctp_timeout_established - INTEGER (seconds) nf_conntrack_sctp_timeout_established - INTEGER (seconds)
default 432000 (5 days) default 210
Default is set to (hb_interval * path_max_retrans + rto_max)
nf_conntrack_sctp_timeout_shutdown_sent - INTEGER (seconds) nf_conntrack_sctp_timeout_shutdown_sent - INTEGER (seconds)
default 0.3 default 0.3
@ -190,12 +192,6 @@ nf_conntrack_sctp_timeout_heartbeat_sent - INTEGER (seconds)
This timeout is used to setup conntrack entry on secondary paths. This timeout is used to setup conntrack entry on secondary paths.
Default is set to hb_interval. Default is set to hb_interval.
nf_conntrack_sctp_timeout_heartbeat_acked - INTEGER (seconds)
default 210
This timeout is used to setup conntrack entry on secondary paths.
Default is set to (hb_interval * path_max_retrans + rto_max)
nf_conntrack_udp_timeout - INTEGER (seconds) nf_conntrack_udp_timeout - INTEGER (seconds)
default 30 default 30

4
Documentation/networking/rxrpc.rst
View File

@ -880,8 +880,8 @@ The kernel interface functions are as follows:
notify_end_rx can be NULL or it can be used to specify a function to be notify_end_rx can be NULL or it can be used to specify a function to be
called when the call changes state to end the Tx phase. This function is called when the call changes state to end the Tx phase. This function is
called with the call-state spinlock held to prevent any reply or final ACK called with a spinlock held to prevent the last DATA packet from being
from being delivered first. transmitted until the function returns.
(#) Receive data from a call:: (#) Receive data from a call::

6
Documentation/sphinx/load_config.py
View File

@ -3,7 +3,7 @@
import os import os
import sys import sys
from sphinx.util.pycompat import execfile_ from sphinx.util.osutil import fs_encoding
# ------------------------------------------------------------------------------ # ------------------------------------------------------------------------------
def loadConfig(namespace): def loadConfig(namespace):
@ -48,7 +48,9 @@ def loadConfig(namespace):
sys.stdout.write("load additional sphinx-config: %s\n" % config_file) sys.stdout.write("load additional sphinx-config: %s\n" % config_file)
config = namespace.copy() config = namespace.copy()
config['__file__'] = config_file config['__file__'] = config_file
execfile_(config_file, config) with open(config_file, 'rb') as f:
code = compile(f.read(), fs_encoding, 'exec')
exec(code, config)
del config['__file__'] del config['__file__']
namespace.update(config) namespace.update(config)
else: else:

10
Documentation/virt/kvm/api.rst
View File

@ -8134,9 +8134,13 @@ considering the state as complete. VMM needs to ensure that the dirty
state is final and avoid missing dirty pages from another ioctl ordered state is final and avoid missing dirty pages from another ioctl ordered
after the bitmap collection. after the bitmap collection.
NOTE: One example of using the backup bitmap is saving arm64 vgic/its NOTE: Multiple examples of using the backup bitmap: (1) save vgic/its
tables through KVM_DEV_ARM_{VGIC_GRP_CTRL, ITS_SAVE_TABLES} command on tables through command KVM_DEV_ARM_{VGIC_GRP_CTRL, ITS_SAVE_TABLES} on
KVM device "kvm-arm-vgic-its" when dirty ring is enabled. KVM device "kvm-arm-vgic-its". (2) restore vgic/its tables through
command KVM_DEV_ARM_{VGIC_GRP_CTRL, ITS_RESTORE_TABLES} on KVM device
"kvm-arm-vgic-its". VGICv3 LPI pending status is restored. (3) save
vgic3 pending table through KVM_DEV_ARM_VGIC_{GRP_CTRL, SAVE_PENDING_TABLES}
command on KVM device "kvm-arm-vgic-v3".
8.30 KVM_CAP_XEN_HVM 8.30 KVM_CAP_XEN_HVM
-------------------- --------------------

36
Documentation/x86/amd-memory-encryption.rst
View File

@ -95,3 +95,39 @@ by supplying mem_encrypt=on on the kernel command line. However, if BIOS does
not enable SME, then Linux will not be able to activate memory encryption, even not enable SME, then Linux will not be able to activate memory encryption, even
if configured to do so by default or the mem_encrypt=on command line parameter if configured to do so by default or the mem_encrypt=on command line parameter
is specified. is specified.
Secure Nested Paging (SNP)
==========================
SEV-SNP introduces new features (SEV_FEATURES[1:63]) which can be enabled
by the hypervisor for security enhancements. Some of these features need
guest side implementation to function correctly. The below table lists the
expected guest behavior with various possible scenarios of guest/hypervisor
SNP feature support.
+-----------------+---------------+---------------+------------------+
| Feature Enabled | Guest needs | Guest has | Guest boot |
| by the HV | implementation| implementation| behaviour |
+=================+===============+===============+==================+
| No | No | No | Boot |
| | | | |
+-----------------+---------------+---------------+------------------+
| No | Yes | No | Boot |
| | | | |
+-----------------+---------------+---------------+------------------+
| No | Yes | Yes | Boot |
| | | | |
+-----------------+---------------+---------------+------------------+
| Yes | No | No | Boot with |
| | | | feature enabled |
+-----------------+---------------+---------------+------------------+
| Yes | Yes | No | Graceful boot |
| | | | failure |
+-----------------+---------------+---------------+------------------+
| Yes | Yes | Yes | Boot with |
| | | | feature enabled |
+-----------------+---------------+---------------+------------------+
More details in AMD64 APM[1] Vol 2: 15.34.10 SEV_STATUS MSR
[1] https://www.amd.com/system/files/TechDocs/40332.pdf

82
MAINTAINERS
View File

@ -383,7 +383,7 @@ ACPI COMPONENT ARCHITECTURE (ACPICA)
M: Robert Moore <robert.moore@intel.com> M: Robert Moore <robert.moore@intel.com>
M: "Rafael J. Wysocki" <rafael.j.wysocki@intel.com> M: "Rafael J. Wysocki" <rafael.j.wysocki@intel.com>
L: linux-acpi@vger.kernel.org L: linux-acpi@vger.kernel.org
L: devel@acpica.org L: acpica-devel@lists.linuxfoundation.org
S: Supported S: Supported
W: https://acpica.org/ W: https://acpica.org/
W: https://github.com/acpica/acpica/ W: https://github.com/acpica/acpica/
@ -1097,14 +1097,12 @@ S: Maintained
F: drivers/dma/ptdma/ F: drivers/dma/ptdma/
AMD SEATTLE DEVICE TREE SUPPORT AMD SEATTLE DEVICE TREE SUPPORT
M: Brijesh Singh <brijeshkumar.singh@amd.com>
M: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com> M: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
M: Tom Lendacky <thomas.lendacky@amd.com> M: Tom Lendacky <thomas.lendacky@amd.com>
S: Supported S: Supported
F: arch/arm64/boot/dts/amd/ F: arch/arm64/boot/dts/amd/
AMD XGBE DRIVER AMD XGBE DRIVER
M: Tom Lendacky <thomas.lendacky@amd.com>
M: "Shyam Sundar S K" <Shyam-sundar.S-k@amd.com> M: "Shyam Sundar S K" <Shyam-sundar.S-k@amd.com>
L: netdev@vger.kernel.org L: netdev@vger.kernel.org
S: Supported S: Supported
@ -2213,6 +2211,9 @@ L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Maintained S: Maintained
T: git git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux.git T: git git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux.git
X: drivers/media/i2c/ X: drivers/media/i2c/
F: arch/arm64/boot/dts/freescale/
X: arch/arm64/boot/dts/freescale/fsl-*
X: arch/arm64/boot/dts/freescale/qoriq-*
N: imx N: imx
N: mxs N: mxs
@ -2451,11 +2452,14 @@ F: drivers/rtc/rtc-mt7622.c
ARM/Mediatek SoC support ARM/Mediatek SoC support
M: Matthias Brugger <matthias.bgg@gmail.com> M: Matthias Brugger <matthias.bgg@gmail.com>
R: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
L: linux-kernel@vger.kernel.org
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
L: linux-mediatek@lists.infradead.org (moderated for non-subscribers) L: linux-mediatek@lists.infradead.org (moderated for non-subscribers)
S: Maintained S: Maintained
W: https://mtk.wiki.kernel.org/ W: https://mtk.wiki.kernel.org/
C: irc://chat.freenode.net/linux-mediatek C: irc://irc.libera.chat/linux-mediatek
F: arch/arm/boot/dts/mt2*
F: arch/arm/boot/dts/mt6* F: arch/arm/boot/dts/mt6*
F: arch/arm/boot/dts/mt7* F: arch/arm/boot/dts/mt7*
F: arch/arm/boot/dts/mt8* F: arch/arm/boot/dts/mt8*
@ -2463,7 +2467,7 @@ F: arch/arm/mach-mediatek/
F: arch/arm64/boot/dts/mediatek/ F: arch/arm64/boot/dts/mediatek/
F: drivers/soc/mediatek/ F: drivers/soc/mediatek/
N: mtk N: mtk
N: mt[678] N: mt[2678]
K: mediatek K: mediatek
ARM/Mediatek USB3 PHY DRIVER ARM/Mediatek USB3 PHY DRIVER
@ -3767,7 +3771,6 @@ F: net/bluetooth/
BONDING DRIVER BONDING DRIVER
M: Jay Vosburgh <j.vosburgh@gmail.com> M: Jay Vosburgh <j.vosburgh@gmail.com>
M: Veaceslav Falico <vfalico@gmail.com>
M: Andy Gospodarek <andy@greyhouse.net> M: Andy Gospodarek <andy@greyhouse.net>
L: netdev@vger.kernel.org L: netdev@vger.kernel.org
S: Supported S: Supported
@ -6948,7 +6951,7 @@ F: drivers/gpu/drm/atmel-hlcdc/
DRM DRIVERS FOR BRIDGE CHIPS DRM DRIVERS FOR BRIDGE CHIPS
M: Andrzej Hajda <andrzej.hajda@intel.com> M: Andrzej Hajda <andrzej.hajda@intel.com>
M: Neil Armstrong <neil.armstrong@linaro.org> M: Neil Armstrong <neil.armstrong@linaro.org>
M: Robert Foss <robert.foss@linaro.org> M: Robert Foss <rfoss@kernel.org>
R: Laurent Pinchart <Laurent.pinchart@ideasonboard.com> R: Laurent Pinchart <Laurent.pinchart@ideasonboard.com>
R: Jonas Karlman <jonas@kwiboo.se> R: Jonas Karlman <jonas@kwiboo.se>
R: Jernej Skrabec <jernej.skrabec@gmail.com> R: Jernej Skrabec <jernej.skrabec@gmail.com>
@ -7616,7 +7619,6 @@ S: Maintained
F: drivers/firmware/efi/test/ F: drivers/firmware/efi/test/
EFI VARIABLE FILESYSTEM EFI VARIABLE FILESYSTEM
M: Matthew Garrett <matthew.garrett@nebula.com>
M: Jeremy Kerr <jk@ozlabs.org> M: Jeremy Kerr <jk@ozlabs.org>
M: Ard Biesheuvel <ardb@kernel.org> M: Ard Biesheuvel <ardb@kernel.org>
L: linux-efi@vger.kernel.org L: linux-efi@vger.kernel.org
@ -7895,7 +7897,11 @@ F: include/linux/extcon/
EXTRA BOOT CONFIG EXTRA BOOT CONFIG
M: Masami Hiramatsu <mhiramat@kernel.org> M: Masami Hiramatsu <mhiramat@kernel.org>
L: linux-kernel@vger.kernel.org
L: linux-trace-kernel@vger.kernel.org
Q: https://patchwork.kernel.org/project/linux-trace-kernel/list/
S: Maintained S: Maintained
T: git git://git.kernel.org/pub/scm/linux/kernel/git/trace/linux-trace.git
F: Documentation/admin-guide/bootconfig.rst F: Documentation/admin-guide/bootconfig.rst
F: fs/proc/bootconfig.c F: fs/proc/bootconfig.c
F: include/linux/bootconfig.h F: include/linux/bootconfig.h
@ -8468,16 +8474,16 @@ F: fs/fscache/
F: include/linux/fscache*.h F: include/linux/fscache*.h
FSCRYPT: FILE SYSTEM LEVEL ENCRYPTION SUPPORT FSCRYPT: FILE SYSTEM LEVEL ENCRYPTION SUPPORT
M: Eric Biggers <ebiggers@kernel.org>
M: Theodore Y. Ts'o <tytso@mit.edu> M: Theodore Y. Ts'o <tytso@mit.edu>
M: Jaegeuk Kim <jaegeuk@kernel.org> M: Jaegeuk Kim <jaegeuk@kernel.org>
M: Eric Biggers <ebiggers@kernel.org>
L: linux-fscrypt@vger.kernel.org L: linux-fscrypt@vger.kernel.org
S: Supported S: Supported
Q: https://patchwork.kernel.org/project/linux-fscrypt/list/ Q: https://patchwork.kernel.org/project/linux-fscrypt/list/
T: git git://git.kernel.org/pub/scm/fs/fscrypt/fscrypt.git T: git https://git.kernel.org/pub/scm/fs/fscrypt/linux.git
F: Documentation/filesystems/fscrypt.rst F: Documentation/filesystems/fscrypt.rst
F: fs/crypto/ F: fs/crypto/
F: include/linux/fscrypt*.h F: include/linux/fscrypt.h
F: include/uapi/linux/fscrypt.h F: include/uapi/linux/fscrypt.h
FSI SUBSYSTEM FSI SUBSYSTEM
@ -8520,10 +8526,10 @@ F: include/linux/fsnotify*.h
FSVERITY: READ-ONLY FILE-BASED AUTHENTICITY PROTECTION FSVERITY: READ-ONLY FILE-BASED AUTHENTICITY PROTECTION
M: Eric Biggers <ebiggers@kernel.org> M: Eric Biggers <ebiggers@kernel.org>
M: Theodore Y. Ts'o <tytso@mit.edu> M: Theodore Y. Ts'o <tytso@mit.edu>
L: linux-fscrypt@vger.kernel.org L: fsverity@lists.linux.dev
S: Supported S: Supported
Q: https://patchwork.kernel.org/project/linux-fscrypt/list/ Q: https://patchwork.kernel.org/project/fsverity/list/
T: git git://git.kernel.org/pub/scm/fs/fscrypt/fscrypt.git fsverity T: git https://git.kernel.org/pub/scm/fs/fsverity/linux.git
F: Documentation/filesystems/fsverity.rst F: Documentation/filesystems/fsverity.rst
F: fs/verity/ F: fs/verity/
F: include/linux/fsverity.h F: include/linux/fsverity.h
@ -8571,6 +8577,7 @@ F: kernel/trace/fgraph.c
F: arch/*/*/*/*ftrace* F: arch/*/*/*/*ftrace*
F: arch/*/*/*ftrace* F: arch/*/*/*ftrace*
F: include/*/ftrace.h F: include/*/ftrace.h
F: samples/ftrace
FUNGIBLE ETHERNET DRIVERS FUNGIBLE ETHERNET DRIVERS
M: Dimitris Michailidis <dmichail@fungible.com> M: Dimitris Michailidis <dmichail@fungible.com>
@ -9299,7 +9306,7 @@ F: net/dsa/tag_hellcreek.c
HISILICON DMA DRIVER HISILICON DMA DRIVER
M: Zhou Wang <wangzhou1@hisilicon.com> M: Zhou Wang <wangzhou1@hisilicon.com>
M: Jie Hai <haijie1@hisilicon.com> M: Jie Hai <haijie1@huawei.com>
L: dmaengine@vger.kernel.org L: dmaengine@vger.kernel.org
S: Maintained S: Maintained
F: drivers/dma/hisi_dma.c F: drivers/dma/hisi_dma.c
@ -13620,7 +13627,7 @@ F: arch/microblaze/
MICROCHIP AT91 DMA DRIVERS MICROCHIP AT91 DMA DRIVERS
M: Ludovic Desroches <ludovic.desroches@microchip.com> M: Ludovic Desroches <ludovic.desroches@microchip.com>
M: Tudor Ambarus <tudor.ambarus@microchip.com> M: Tudor Ambarus <tudor.ambarus@linaro.org>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
L: dmaengine@vger.kernel.org L: dmaengine@vger.kernel.org
S: Supported S: Supported
@ -13665,7 +13672,7 @@ F: Documentation/devicetree/bindings/media/microchip,csi2dc.yaml
F: drivers/media/platform/microchip/microchip-csi2dc.c F: drivers/media/platform/microchip/microchip-csi2dc.c
MICROCHIP ECC DRIVER MICROCHIP ECC DRIVER
M: Tudor Ambarus <tudor.ambarus@microchip.com> M: Tudor Ambarus <tudor.ambarus@linaro.org>
L: linux-crypto@vger.kernel.org L: linux-crypto@vger.kernel.org
S: Maintained S: Maintained
F: drivers/crypto/atmel-ecc.* F: drivers/crypto/atmel-ecc.*
@ -13762,7 +13769,7 @@ S: Maintained
F: drivers/mmc/host/atmel-mci.c F: drivers/mmc/host/atmel-mci.c
MICROCHIP NAND DRIVER MICROCHIP NAND DRIVER
M: Tudor Ambarus <tudor.ambarus@microchip.com> M: Tudor Ambarus <tudor.ambarus@linaro.org>
L: linux-mtd@lists.infradead.org L: linux-mtd@lists.infradead.org
S: Supported S: Supported
F: Documentation/devicetree/bindings/mtd/atmel-nand.txt F: Documentation/devicetree/bindings/mtd/atmel-nand.txt
@ -13814,7 +13821,7 @@ S: Supported
F: drivers/power/reset/at91-sama5d2_shdwc.c F: drivers/power/reset/at91-sama5d2_shdwc.c
MICROCHIP SPI DRIVER MICROCHIP SPI DRIVER
M: Tudor Ambarus <tudor.ambarus@microchip.com> M: Tudor Ambarus <tudor.ambarus@linaro.org>
S: Supported S: Supported
F: drivers/spi/spi-atmel.* F: drivers/spi/spi-atmel.*
@ -14601,7 +14608,6 @@ F: tools/testing/selftests/net/ipsec.c
NETWORKING [IPv4/IPv6] NETWORKING [IPv4/IPv6]
M: "David S. Miller" <davem@davemloft.net> M: "David S. Miller" <davem@davemloft.net>
M: Hideaki YOSHIFUJI <yoshfuji@linux-ipv6.org>
M: David Ahern <dsahern@kernel.org> M: David Ahern <dsahern@kernel.org>
L: netdev@vger.kernel.org L: netdev@vger.kernel.org
S: Maintained S: Maintained
@ -14634,7 +14640,6 @@ F: net/netfilter/xt_SECMARK.c
F: net/netlabel/ F: net/netlabel/
NETWORKING [MPTCP] NETWORKING [MPTCP]
M: Mat Martineau <mathew.j.martineau@linux.intel.com>
M: Matthieu Baerts <matthieu.baerts@tessares.net> M: Matthieu Baerts <matthieu.baerts@tessares.net>
L: netdev@vger.kernel.org L: netdev@vger.kernel.org
L: mptcp@lists.linux.dev L: mptcp@lists.linux.dev
@ -14919,7 +14924,8 @@ T: git://git.infradead.org/nvme.git
F: Documentation/nvme/ F: Documentation/nvme/
F: drivers/nvme/host/ F: drivers/nvme/host/
F: drivers/nvme/common/ F: drivers/nvme/common/
F: include/linux/nvme* F: include/linux/nvme.h
F: include/linux/nvme-*.h
F: include/uapi/linux/nvme_ioctl.h F: include/uapi/linux/nvme_ioctl.h
NVM EXPRESS FABRICS AUTHENTICATION NVM EXPRESS FABRICS AUTHENTICATION
@ -15658,7 +15664,7 @@ OPENRISC ARCHITECTURE
M: Jonas Bonn <jonas@southpole.se> M: Jonas Bonn <jonas@southpole.se>
M: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> M: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
M: Stafford Horne <shorne@gmail.com> M: Stafford Horne <shorne@gmail.com>
L: openrisc@lists.librecores.org L: linux-openrisc@vger.kernel.org
S: Maintained S: Maintained
W: http://openrisc.io W: http://openrisc.io
T: git https://github.com/openrisc/linux.git T: git https://github.com/openrisc/linux.git
@ -15749,6 +15755,12 @@ S: Maintained
W: https://wireless.wiki.kernel.org/en/users/Drivers/p54 W: https://wireless.wiki.kernel.org/en/users/Drivers/p54
F: drivers/net/wireless/intersil/p54/ F: drivers/net/wireless/intersil/p54/
PACKET SOCKETS
M: Willem de Bruijn <willemdebruijn.kernel@gmail.com>
S: Maintained
F: include/uapi/linux/if_packet.h
F: net/packet/af_packet.c
PACKING PACKING
M: Vladimir Oltean <olteanv@gmail.com> M: Vladimir Oltean <olteanv@gmail.com>
L: netdev@vger.kernel.org L: netdev@vger.kernel.org
@ -17237,7 +17249,7 @@ F: Documentation/devicetree/bindings/net/qcom,bam-dmux.yaml
F: drivers/net/wwan/qcom_bam_dmux.c F: drivers/net/wwan/qcom_bam_dmux.c
QUALCOMM CAMERA SUBSYSTEM DRIVER QUALCOMM CAMERA SUBSYSTEM DRIVER
M: Robert Foss <robert.foss@linaro.org> M: Robert Foss <rfoss@kernel.org>
M: Todor Tomov <todor.too@gmail.com> M: Todor Tomov <todor.too@gmail.com>
L: linux-media@vger.kernel.org L: linux-media@vger.kernel.org
S: Maintained S: Maintained
@ -17317,7 +17329,7 @@ F: drivers/dma/qcom/hidma*
QUALCOMM I2C CCI DRIVER QUALCOMM I2C CCI DRIVER
M: Loic Poulain <loic.poulain@linaro.org> M: Loic Poulain <loic.poulain@linaro.org>
M: Robert Foss <robert.foss@linaro.org> M: Robert Foss <rfoss@kernel.org>
L: linux-i2c@vger.kernel.org L: linux-i2c@vger.kernel.org
L: linux-arm-msm@vger.kernel.org L: linux-arm-msm@vger.kernel.org
S: Maintained S: Maintained
@ -17956,6 +17968,7 @@ M: Albert Ou <aou@eecs.berkeley.edu>
L: linux-riscv@lists.infradead.org L: linux-riscv@lists.infradead.org
S: Supported S: Supported
Q: https://patchwork.kernel.org/project/linux-riscv/list/ Q: https://patchwork.kernel.org/project/linux-riscv/list/
C: irc://irc.libera.chat/riscv
P: Documentation/riscv/patch-acceptance.rst P: Documentation/riscv/patch-acceptance.rst
T: git git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux.git T: git git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux.git
F: arch/riscv/ F: arch/riscv/
@ -18677,9 +18690,9 @@ F: drivers/target/
F: include/target/ F: include/target/
SCTP PROTOCOL SCTP PROTOCOL
M: Vlad Yasevich <vyasevich@gmail.com>
M: Neil Horman <nhorman@tuxdriver.com> M: Neil Horman <nhorman@tuxdriver.com>
M: Marcelo Ricardo Leitner <marcelo.leitner@gmail.com> M: Marcelo Ricardo Leitner <marcelo.leitner@gmail.com>
M: Xin Long <lucien.xin@gmail.com>
L: linux-sctp@vger.kernel.org L: linux-sctp@vger.kernel.org
S: Maintained S: Maintained
W: http://lksctp.sourceforge.net W: http://lksctp.sourceforge.net
@ -19325,6 +19338,13 @@ L: alsa-devel@alsa-project.org (moderated for non-subscribers)
S: Orphan S: Orphan
F: sound/soc/uniphier/ F: sound/soc/uniphier/
SOCKET TIMESTAMPING
M: Willem de Bruijn <willemdebruijn.kernel@gmail.com>
S: Maintained
F: Documentation/networking/timestamping.rst
F: include/uapi/linux/net_tstamp.h
F: tools/testing/selftests/net/so_txtime.c
SOEKRIS NET48XX LED SUPPORT SOEKRIS NET48XX LED SUPPORT
M: Chris Boot <bootc@bootc.net> M: Chris Boot <bootc@bootc.net>
S: Maintained S: Maintained
@ -19672,7 +19692,7 @@ F: drivers/clk/spear/
F: drivers/pinctrl/spear/ F: drivers/pinctrl/spear/
SPI NOR SUBSYSTEM SPI NOR SUBSYSTEM
M: Tudor Ambarus <tudor.ambarus@microchip.com> M: Tudor Ambarus <tudor.ambarus@linaro.org>
M: Pratyush Yadav <pratyush@kernel.org> M: Pratyush Yadav <pratyush@kernel.org>
R: Michael Walle <michael@walle.cc> R: Michael Walle <michael@walle.cc>
L: linux-mtd@lists.infradead.org L: linux-mtd@lists.infradead.org
@ -21710,6 +21730,7 @@ F: include/uapi/linux/uvcvideo.h
USB WEBCAM GADGET USB WEBCAM GADGET
M: Laurent Pinchart <laurent.pinchart@ideasonboard.com> M: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
M: Daniel Scally <dan.scally@ideasonboard.com>
L: linux-usb@vger.kernel.org L: linux-usb@vger.kernel.org
S: Maintained S: Maintained
F: drivers/usb/gadget/function/*uvc* F: drivers/usb/gadget/function/*uvc*
@ -21745,6 +21766,13 @@ T: git git://linuxtv.org/media_tree.git
F: Documentation/admin-guide/media/zr364xx* F: Documentation/admin-guide/media/zr364xx*
F: drivers/staging/media/deprecated/zr364xx/ F: drivers/staging/media/deprecated/zr364xx/
USER DATAGRAM PROTOCOL (UDP)
M: Willem de Bruijn <willemdebruijn.kernel@gmail.com>
S: Maintained
F: include/linux/udp.h
F: net/ipv4/udp.c
F: net/ipv6/udp.c
USER-MODE LINUX (UML) USER-MODE LINUX (UML)
M: Richard Weinberger <richard@nod.at> M: Richard Weinberger <richard@nod.at>
M: Anton Ivanov <anton.ivanov@cambridgegreys.com> M: Anton Ivanov <anton.ivanov@cambridgegreys.com>

17
Makefile
View File

@ -2,7 +2,7 @@
VERSION = 6 VERSION = 6
PATCHLEVEL = 2 PATCHLEVEL = 2
SUBLEVEL = 0 SUBLEVEL = 0
EXTRAVERSION = -rc3 EXTRAVERSION = -rc7
NAME = Hurr durr I'ma ninja sloth NAME = Hurr durr I'ma ninja sloth
# *DOCUMENTATION* # *DOCUMENTATION*
@ -549,7 +549,7 @@ LDFLAGS_MODULE =
CFLAGS_KERNEL = CFLAGS_KERNEL =
RUSTFLAGS_KERNEL = RUSTFLAGS_KERNEL =
AFLAGS_KERNEL = AFLAGS_KERNEL =
export LDFLAGS_vmlinux = LDFLAGS_vmlinux =
# Use USERINCLUDE when you must reference the UAPI directories only. # Use USERINCLUDE when you must reference the UAPI directories only.
USERINCLUDE := \ USERINCLUDE := \
@ -1248,6 +1248,18 @@ vmlinux.o modules.builtin.modinfo modules.builtin: vmlinux_o
@: @:
PHONY += vmlinux PHONY += vmlinux
# LDFLAGS_vmlinux in the top Makefile defines linker flags for the top vmlinux,
# not for decompressors. LDFLAGS_vmlinux in arch/*/boot/compressed/Makefile is
# unrelated; the decompressors just happen to have the same base name,
# arch/*/boot/compressed/vmlinux.
# Export LDFLAGS_vmlinux only to scripts/Makefile.vmlinux.
#
# _LDFLAGS_vmlinux is a workaround for the 'private export' bug:
# https://savannah.gnu.org/bugs/?61463
# For Make > 4.4, the following simple code will work:
# vmlinux: private export LDFLAGS_vmlinux := $(LDFLAGS_vmlinux)
vmlinux: private _LDFLAGS_vmlinux := $(LDFLAGS_vmlinux)
vmlinux: export LDFLAGS_vmlinux = $(_LDFLAGS_vmlinux)
vmlinux: vmlinux.o $(KBUILD_LDS) modpost vmlinux: vmlinux.o $(KBUILD_LDS) modpost
$(Q)$(MAKE) -f $(srctree)/scripts/Makefile.vmlinux $(Q)$(MAKE) -f $(srctree)/scripts/Makefile.vmlinux
@ -1533,6 +1545,7 @@ endif
# *.ko are usually independent of vmlinux, but CONFIG_DEBUG_INFOBTF_MODULES # *.ko are usually independent of vmlinux, but CONFIG_DEBUG_INFOBTF_MODULES
# is an exception. # is an exception.
ifdef CONFIG_DEBUG_INFO_BTF_MODULES ifdef CONFIG_DEBUG_INFO_BTF_MODULES
KBUILD_BUILTIN := 1
modules: vmlinux modules: vmlinux
endif endif

2
arch/arm/Makefile
View File

@ -132,7 +132,7 @@ AFLAGS_NOWARN :=$(call as-option,-Wa$(comma)-mno-warn-deprecated,-Wa$(comma)-W)
ifeq ($(CONFIG_THUMB2_KERNEL),y) ifeq ($(CONFIG_THUMB2_KERNEL),y)
CFLAGS_ISA :=-Wa,-mimplicit-it=always $(AFLAGS_NOWARN) CFLAGS_ISA :=-Wa,-mimplicit-it=always $(AFLAGS_NOWARN)
AFLAGS_ISA :=$(CFLAGS_ISA) -Wa$(comma)-mthumb -D__thumb2__=2 AFLAGS_ISA :=$(CFLAGS_ISA) -Wa$(comma)-mthumb
CFLAGS_ISA +=-mthumb CFLAGS_ISA +=-mthumb
else else
CFLAGS_ISA :=$(call cc-option,-marm,) $(AFLAGS_NOWARN) CFLAGS_ISA :=$(call cc-option,-marm,) $(AFLAGS_NOWARN)

4
arch/arm/boot/dts/armada-38x.dtsi
View File

@ -304,7 +304,7 @@
}; };
gpio0: gpio@18100 { gpio0: gpio@18100 {
compatible = "marvell,armadaxp-gpio", compatible = "marvell,armada-370-gpio",
"marvell,orion-gpio"; "marvell,orion-gpio";
reg = <0x18100 0x40>, <0x181c0 0x08>; reg = <0x18100 0x40>, <0x181c0 0x08>;
reg-names = "gpio", "pwm"; reg-names = "gpio", "pwm";
@ -323,7 +323,7 @@
}; };
gpio1: gpio@18140 { gpio1: gpio@18140 {
compatible = "marvell,armadaxp-gpio", compatible = "marvell,armada-370-gpio",
"marvell,orion-gpio"; "marvell,orion-gpio";
reg = <0x18140 0x40>, <0x181c8 0x08>; reg = <0x18140 0x40>, <0x181c8 0x08>;
reg-names = "gpio", "pwm"; reg-names = "gpio", "pwm";

4
arch/arm/boot/dts/armada-39x.dtsi
View File

@ -213,7 +213,7 @@
}; };
gpio0: gpio@18100 { gpio0: gpio@18100 {
compatible = "marvell,armadaxp-gpio", "marvell,orion-gpio"; compatible = "marvell,orion-gpio";
reg = <0x18100 0x40>; reg = <0x18100 0x40>;
ngpios = <32>; ngpios = <32>;
gpio-controller; gpio-controller;
@ -227,7 +227,7 @@
}; };
gpio1: gpio@18140 { gpio1: gpio@18140 {
compatible = "marvell,armadaxp-gpio", "marvell,orion-gpio"; compatible = "marvell,orion-gpio";
reg = <0x18140 0x40>; reg = <0x18140 0x40>;
ngpios = <28>; ngpios = <28>;
gpio-controller; gpio-controller;

2
arch/arm/boot/dts/aspeed-bmc-ibm-bonnell.dts
View File

@ -751,7 +751,7 @@
}; };
pca9849@75 { pca9849@75 {
compatible = "nxp,pca849"; compatible = "nxp,pca9849";
reg = <0x75>; reg = <0x75>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;

2
arch/arm/boot/dts/imx53-ppd.dts
View File

@ -488,7 +488,7 @@
scl-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>; scl-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>;
status = "okay"; status = "okay";
i2c-switch@70 { i2c-mux@70 {
compatible = "nxp,pca9547"; compatible = "nxp,pca9547";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;

1
arch/arm/boot/dts/imx6qdl-gw560x.dtsi
View File

@ -632,7 +632,6 @@
&uart1 { &uart1 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>; pinctrl-0 = <&pinctrl_uart1>;
uart-has-rtscts;
rts-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>; rts-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
status = "okay"; status = "okay";
}; };

2
arch/arm/boot/dts/imx6ul-pico-dwarf.dts
View File

@ -32,7 +32,7 @@
}; };
&i2c2 { &i2c2 {
clock_frequency = <100000>; clock-frequency = <100000>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2>; pinctrl-0 = <&pinctrl_i2c2>;
status = "okay"; status = "okay";

4
arch/arm/boot/dts/imx7d-pico-dwarf.dts
View File

@ -32,7 +32,7 @@
}; };
&i2c1 { &i2c1 {
clock_frequency = <100000>; clock-frequency = <100000>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1>; pinctrl-0 = <&pinctrl_i2c1>;
status = "okay"; status = "okay";
@ -52,7 +52,7 @@
}; };
&i2c4 { &i2c4 {
clock_frequency = <100000>; clock-frequency = <100000>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1>; pinctrl-0 = <&pinctrl_i2c1>;
status = "okay"; status = "okay";

4
arch/arm/boot/dts/imx7d-pico-nymph.dts
View File

@ -43,7 +43,7 @@
}; };
&i2c1 { &i2c1 {
clock_frequency = <100000>; clock-frequency = <100000>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1>; pinctrl-0 = <&pinctrl_i2c1>;
status = "okay"; status = "okay";
@ -64,7 +64,7 @@
}; };
&i2c2 { &i2c2 {
clock_frequency = <100000>; clock-frequency = <100000>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2>; pinctrl-0 = <&pinctrl_i2c2>;
status = "okay"; status = "okay";

3
arch/arm/boot/dts/imx7d-smegw01.dts
View File

@ -198,6 +198,7 @@
&usbotg2 { &usbotg2 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbotg2>; pinctrl-0 = <&pinctrl_usbotg2>;
over-current-active-low;
dr_mode = "host"; dr_mode = "host";
status = "okay"; status = "okay";
}; };
@ -374,7 +375,7 @@
pinctrl_usbotg2: usbotg2grp { pinctrl_usbotg2: usbotg2grp {
fsl,pins = < fsl,pins = <
MX7D_PAD_UART3_RTS_B__USB_OTG2_OC 0x04 MX7D_PAD_UART3_RTS_B__USB_OTG2_OC 0x5c
>; >;
}; };

1
arch/arm/boot/dts/nuvoton-wpcm450.dtsi
View File

@ -480,6 +480,7 @@
reg = <0xc8000000 0x1000>, <0xc0000000 0x4000000>; reg = <0xc8000000 0x1000>, <0xc0000000 0x4000000>;
reg-names = "control", "memory"; reg-names = "control", "memory";
clocks = <&clk 0>; clocks = <&clk 0>;
nuvoton,shm = <&shm>;
status = "disabled"; status = "disabled";
}; };

22
arch/arm/boot/dts/qcom-apq8084-ifc6540.dts
View File

@ -19,16 +19,16 @@
serial@f995e000 { serial@f995e000 {
status = "okay"; status = "okay";
}; };
sdhci@f9824900 {
bus-width = <8>;
non-removable;
status = "okay";
};
sdhci@f98a4900 {
cd-gpios = <&tlmm 122 GPIO_ACTIVE_LOW>;
bus-width = <4>;
};
}; };
}; };
&sdhc_1 {
bus-width = <8>;
non-removable;
status = "okay";
};
&sdhc_2 {
cd-gpios = <&tlmm 122 GPIO_ACTIVE_LOW>;
bus-width = <4>;
};

4
arch/arm/boot/dts/qcom-apq8084.dtsi
View File

@ -421,7 +421,7 @@
status = "disabled"; status = "disabled";
}; };
mmc@f9824900 { sdhc_1: mmc@f9824900 {
compatible = "qcom,apq8084-sdhci", "qcom,sdhci-msm-v4"; compatible = "qcom,apq8084-sdhci", "qcom,sdhci-msm-v4";
reg = <0xf9824900 0x11c>, <0xf9824000 0x800>; reg = <0xf9824900 0x11c>, <0xf9824000 0x800>;
reg-names = "hc", "core"; reg-names = "hc", "core";
@ -434,7 +434,7 @@
status = "disabled"; status = "disabled";
}; };
mmc@f98a4900 { sdhc_2: mmc@f98a4900 {
compatible = "qcom,apq8084-sdhci", "qcom,sdhci-msm-v4"; compatible = "qcom,apq8084-sdhci", "qcom,sdhci-msm-v4";
reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>; reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>;
reg-names = "hc", "core"; reg-names = "hc", "core";

2
arch/arm/boot/dts/sam9x60.dtsi
View File

@ -564,7 +564,7 @@
mpddrc: mpddrc@ffffe800 { mpddrc: mpddrc@ffffe800 {
compatible = "microchip,sam9x60-ddramc", "atmel,sama5d3-ddramc"; compatible = "microchip,sam9x60-ddramc", "atmel,sama5d3-ddramc";
reg = <0xffffe800 0x200>; reg = <0xffffe800 0x200>;
clocks = <&pmc PMC_TYPE_SYSTEM 2>, <&pmc PMC_TYPE_CORE PMC_MCK>; clocks = <&pmc PMC_TYPE_SYSTEM 2>, <&pmc PMC_TYPE_PERIPHERAL 49>;
clock-names = "ddrck", "mpddr"; clock-names = "ddrck", "mpddr";
}; };

8
arch/arm/boot/dts/stm32mp151a-prtt1l.dtsi
View File

@ -101,8 +101,12 @@
&qspi { &qspi {
pinctrl-names = "default", "sleep"; pinctrl-names = "default", "sleep";
pinctrl-0 = <&qspi_clk_pins_a &qspi_bk1_pins_a>; pinctrl-0 = <&qspi_clk_pins_a
pinctrl-1 = <&qspi_clk_sleep_pins_a &qspi_bk1_sleep_pins_a>; &qspi_bk1_pins_a
&qspi_cs1_pins_a>;
pinctrl-1 = <&qspi_clk_sleep_pins_a
&qspi_bk1_sleep_pins_a
&qspi_cs1_sleep_pins_a>;
reg = <0x58003000 0x1000>, <0x70000000 0x4000000>; reg = <0x58003000 0x1000>, <0x70000000 0x4000000>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;

8
arch/arm/boot/dts/stm32mp157c-emstamp-argon.dtsi
View File

@ -391,8 +391,12 @@
&qspi { &qspi {
pinctrl-names = "default", "sleep"; pinctrl-names = "default", "sleep";
pinctrl-0 = <&qspi_clk_pins_a &qspi_bk1_pins_a>; pinctrl-0 = <&qspi_clk_pins_a
pinctrl-1 = <&qspi_clk_sleep_pins_a &qspi_bk1_sleep_pins_a>; &qspi_bk1_pins_a
&qspi_cs1_pins_a>;
pinctrl-1 = <&qspi_clk_sleep_pins_a
&qspi_bk1_sleep_pins_a
&qspi_cs1_sleep_pins_a>;
reg = <0x58003000 0x1000>, <0x70000000 0x4000000>; reg = <0x58003000 0x1000>, <0x70000000 0x4000000>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;

8
arch/arm/boot/dts/stm32mp15xx-dhcom-som.dtsi
View File

@ -428,8 +428,12 @@
&qspi { &qspi {
pinctrl-names = "default", "sleep"; pinctrl-names = "default", "sleep";
pinctrl-0 = <&qspi_clk_pins_a &qspi_bk1_pins_a>; pinctrl-0 = <&qspi_clk_pins_a
pinctrl-1 = <&qspi_clk_sleep_pins_a &qspi_bk1_sleep_pins_a>; &qspi_bk1_pins_a
&qspi_cs1_pins_a>;
pinctrl-1 = <&qspi_clk_sleep_pins_a
&qspi_bk1_sleep_pins_a
&qspi_cs1_sleep_pins_a>;
reg = <0x58003000 0x1000>, <0x70000000 0x4000000>; reg = <0x58003000 0x1000>, <0x70000000 0x4000000>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;

8
arch/arm/boot/dts/stm32mp15xx-dhcor-som.dtsi
View File

@ -247,8 +247,12 @@
&qspi { &qspi {
pinctrl-names = "default", "sleep"; pinctrl-names = "default", "sleep";
pinctrl-0 = <&qspi_clk_pins_a &qspi_bk1_pins_a>; pinctrl-0 = <&qspi_clk_pins_a
pinctrl-1 = <&qspi_clk_sleep_pins_a &qspi_bk1_sleep_pins_a>; &qspi_bk1_pins_a
&qspi_cs1_pins_a>;
pinctrl-1 = <&qspi_clk_sleep_pins_a
&qspi_bk1_sleep_pins_a
&qspi_cs1_sleep_pins_a>;
reg = <0x58003000 0x1000>, <0x70000000 0x200000>; reg = <0x58003000 0x1000>, <0x70000000 0x200000>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;

2
arch/arm/boot/dts/vf610-zii-dev-rev-b.dts
View File

@ -345,7 +345,7 @@
}; };
&i2c2 { &i2c2 {
tca9548@70 { i2c-mux@70 {
compatible = "nxp,pca9548"; compatible = "nxp,pca9548";
pinctrl-0 = <&pinctrl_i2c_mux_reset>; pinctrl-0 = <&pinctrl_i2c_mux_reset>;
pinctrl-names = "default"; pinctrl-names = "default";

2
arch/arm/boot/dts/vf610-zii-dev-rev-c.dts
View File

@ -340,7 +340,7 @@
}; };
&i2c2 { &i2c2 {
tca9548@70 { i2c-mux@70 {
compatible = "nxp,pca9548"; compatible = "nxp,pca9548";
pinctrl-0 = <&pinctrl_i2c_mux_reset>; pinctrl-0 = <&pinctrl_i2c_mux_reset>;
pinctrl-names = "default"; pinctrl-names = "default";

7
arch/arm/crypto/Makefile
View File

@ -53,7 +53,12 @@ $(obj)/%-core.S: $(src)/%-armv4.pl
clean-files += poly1305-core.S sha256-core.S sha512-core.S clean-files += poly1305-core.S sha256-core.S sha512-core.S
aflags-thumb2-$(CONFIG_THUMB2_KERNEL) := -U__thumb2__ -D__thumb2__=1
AFLAGS_sha256-core.o += $(aflags-thumb2-y)
AFLAGS_sha512-core.o += $(aflags-thumb2-y)
# massage the perlasm code a bit so we only get the NEON routine if we need it # massage the perlasm code a bit so we only get the NEON routine if we need it
poly1305-aflags-$(CONFIG_CPU_V7) := -U__LINUX_ARM_ARCH__ -D__LINUX_ARM_ARCH__=5 poly1305-aflags-$(CONFIG_CPU_V7) := -U__LINUX_ARM_ARCH__ -D__LINUX_ARM_ARCH__=5
poly1305-aflags-$(CONFIG_KERNEL_MODE_NEON) := -U__LINUX_ARM_ARCH__ -D__LINUX_ARM_ARCH__=7 poly1305-aflags-$(CONFIG_KERNEL_MODE_NEON) := -U__LINUX_ARM_ARCH__ -D__LINUX_ARM_ARCH__=7
AFLAGS_poly1305-core.o += $(poly1305-aflags-y) AFLAGS_poly1305-core.o += $(poly1305-aflags-y) $(aflags-thumb2-y)

1
arch/arm/mach-footbridge/isa-rtc.c
View File

@ -20,7 +20,6 @@
#include <linux/init.h> #include <linux/init.h>
#include <linux/mc146818rtc.h> #include <linux/mc146818rtc.h>
#include <linux/bcd.h>
#include <linux/io.h> #include <linux/io.h>
#include "common.h" #include "common.h"

1
arch/arm/mach-imx/cpu-imx25.c
View File

@ -23,6 +23,7 @@ static int mx25_read_cpu_rev(void)
np = of_find_compatible_node(NULL, NULL, "fsl,imx25-iim"); np = of_find_compatible_node(NULL, NULL, "fsl,imx25-iim");
iim_base = of_iomap(np, 0); iim_base = of_iomap(np, 0);
of_node_put(np);
BUG_ON(!iim_base); BUG_ON(!iim_base);
rev = readl(iim_base + MXC_IIMSREV); rev = readl(iim_base + MXC_IIMSREV);
iounmap(iim_base); iounmap(iim_base);

1
arch/arm/mach-imx/cpu-imx27.c
View File

@ -28,6 +28,7 @@ static int mx27_read_cpu_rev(void)
np = of_find_compatible_node(NULL, NULL, "fsl,imx27-ccm"); np = of_find_compatible_node(NULL, NULL, "fsl,imx27-ccm");
ccm_base = of_iomap(np, 0); ccm_base = of_iomap(np, 0);
of_node_put(np);
BUG_ON(!ccm_base); BUG_ON(!ccm_base);
/* /*
* now we have access to the IO registers. As we need * now we have access to the IO registers. As we need

1
arch/arm/mach-imx/cpu-imx31.c
View File

@ -39,6 +39,7 @@ static int mx31_read_cpu_rev(void)
np = of_find_compatible_node(NULL, NULL, "fsl,imx31-iim"); np = of_find_compatible_node(NULL, NULL, "fsl,imx31-iim");
iim_base = of_iomap(np, 0); iim_base = of_iomap(np, 0);
of_node_put(np);
BUG_ON(!iim_base); BUG_ON(!iim_base);
/* read SREV register from IIM module */ /* read SREV register from IIM module */

1
arch/arm/mach-imx/cpu-imx35.c
View File

@ -21,6 +21,7 @@ static int mx35_read_cpu_rev(void)
np = of_find_compatible_node(NULL, NULL, "fsl,imx35-iim"); np = of_find_compatible_node(NULL, NULL, "fsl,imx35-iim");
iim_base = of_iomap(np, 0); iim_base = of_iomap(np, 0);
of_node_put(np);
BUG_ON(!iim_base); BUG_ON(!iim_base);
rev = imx_readl(iim_base + MXC_IIMSREV); rev = imx_readl(iim_base + MXC_IIMSREV);

1
arch/arm/mach-imx/cpu-imx5.c
View File

@ -28,6 +28,7 @@ static u32 imx5_read_srev_reg(const char *compat)
np = of_find_compatible_node(NULL, NULL, compat); np = of_find_compatible_node(NULL, NULL, compat);
iim_base = of_iomap(np, 0); iim_base = of_iomap(np, 0);
of_node_put(np);
WARN_ON(!iim_base); WARN_ON(!iim_base);
srev = readl(iim_base + IIM_SREV) & 0xff; srev = readl(iim_base + IIM_SREV) & 0xff;

5
arch/arm/mach-omap1/Kconfig
View File

@ -4,6 +4,7 @@ menuconfig ARCH_OMAP1
depends on ARCH_MULTI_V4T || ARCH_MULTI_V5 depends on ARCH_MULTI_V4T || ARCH_MULTI_V5
depends on CPU_LITTLE_ENDIAN depends on CPU_LITTLE_ENDIAN
depends on ATAGS depends on ATAGS
select ARCH_OMAP
select ARCH_HAS_HOLES_MEMORYMODEL select ARCH_HAS_HOLES_MEMORYMODEL
select ARCH_OMAP select ARCH_OMAP
select CLKSRC_MMIO select CLKSRC_MMIO
@ -45,10 +46,6 @@ config ARCH_OMAP16XX
select CPU_ARM926T select CPU_ARM926T
select OMAP_DM_TIMER select OMAP_DM_TIMER
config ARCH_OMAP1_ANY
select ARCH_OMAP
def_bool ARCH_OMAP730 || ARCH_OMAP850 || ARCH_OMAP15XX || ARCH_OMAP16XX
config ARCH_OMAP config ARCH_OMAP
bool bool

4
arch/arm/mach-omap1/Makefile
View File

@ -3,8 +3,6 @@
# Makefile for the linux kernel. # Makefile for the linux kernel.
# #
ifdef CONFIG_ARCH_OMAP1_ANY
# Common support # Common support
obj-y := io.o id.o sram-init.o sram.o time.o irq.o mux.o flash.o \ obj-y := io.o id.o sram-init.o sram.o time.o irq.o mux.o flash.o \
serial.o devices.o dma.o omap-dma.o fb.o serial.o devices.o dma.o omap-dma.o fb.o
@ -59,5 +57,3 @@ obj-$(CONFIG_ARCH_OMAP730) += gpio7xx.o
obj-$(CONFIG_ARCH_OMAP850) += gpio7xx.o obj-$(CONFIG_ARCH_OMAP850) += gpio7xx.o
obj-$(CONFIG_ARCH_OMAP15XX) += gpio15xx.o obj-$(CONFIG_ARCH_OMAP15XX) += gpio15xx.o
obj-$(CONFIG_ARCH_OMAP16XX) += gpio16xx.o obj-$(CONFIG_ARCH_OMAP16XX) += gpio16xx.o
endif

1
arch/arm/mach-omap1/gpio15xx.c
View File

@ -11,6 +11,7 @@
#include <linux/gpio.h> #include <linux/gpio.h>
#include <linux/platform_data/gpio-omap.h> #include <linux/platform_data/gpio-omap.h>
#include <linux/soc/ti/omap1-soc.h> #include <linux/soc/ti/omap1-soc.h>
#include <asm/irq.h>
#include "irqs.h" #include "irqs.h"

32
arch/arm/mach-omap1/io.c
View File

@ -22,17 +22,14 @@
* The machine specific code may provide the extra mapping besides the * The machine specific code may provide the extra mapping besides the
* default mapping provided here. * default mapping provided here.
*/ */
static struct map_desc omap_io_desc[] __initdata = { #if defined (CONFIG_ARCH_OMAP730) || defined (CONFIG_ARCH_OMAP850)
static struct map_desc omap7xx_io_desc[] __initdata = {
{ {
.virtual = OMAP1_IO_VIRT, .virtual = OMAP1_IO_VIRT,
.pfn = __phys_to_pfn(OMAP1_IO_PHYS), .pfn = __phys_to_pfn(OMAP1_IO_PHYS),
.length = OMAP1_IO_SIZE, .length = OMAP1_IO_SIZE,
.type = MT_DEVICE .type = MT_DEVICE
} },
};
#if defined (CONFIG_ARCH_OMAP730) || defined (CONFIG_ARCH_OMAP850)
static struct map_desc omap7xx_io_desc[] __initdata = {
{ {
.virtual = OMAP7XX_DSP_BASE, .virtual = OMAP7XX_DSP_BASE,
.pfn = __phys_to_pfn(OMAP7XX_DSP_START), .pfn = __phys_to_pfn(OMAP7XX_DSP_START),
@ -49,6 +46,12 @@ static struct map_desc omap7xx_io_desc[] __initdata = {
#ifdef CONFIG_ARCH_OMAP15XX #ifdef CONFIG_ARCH_OMAP15XX
static struct map_desc omap1510_io_desc[] __initdata = { static struct map_desc omap1510_io_desc[] __initdata = {
{
.virtual = OMAP1_IO_VIRT,
.pfn = __phys_to_pfn(OMAP1_IO_PHYS),
.length = OMAP1_IO_SIZE,
.type = MT_DEVICE
},
{ {
.virtual = OMAP1510_DSP_BASE, .virtual = OMAP1510_DSP_BASE,
.pfn = __phys_to_pfn(OMAP1510_DSP_START), .pfn = __phys_to_pfn(OMAP1510_DSP_START),
@ -65,6 +68,12 @@ static struct map_desc omap1510_io_desc[] __initdata = {
#if defined(CONFIG_ARCH_OMAP16XX) #if defined(CONFIG_ARCH_OMAP16XX)
static struct map_desc omap16xx_io_desc[] __initdata = { static struct map_desc omap16xx_io_desc[] __initdata = {
{
.virtual = OMAP1_IO_VIRT,
.pfn = __phys_to_pfn(OMAP1_IO_PHYS),
.length = OMAP1_IO_SIZE,
.type = MT_DEVICE
},
{ {
.virtual = OMAP16XX_DSP_BASE, .virtual = OMAP16XX_DSP_BASE,
.pfn = __phys_to_pfn(OMAP16XX_DSP_START), .pfn = __phys_to_pfn(OMAP16XX_DSP_START),
@ -79,18 +88,9 @@ static struct map_desc omap16xx_io_desc[] __initdata = {
}; };
#endif #endif
/*
* Maps common IO regions for omap1
*/
static void __init omap1_map_common_io(void)
{
iotable_init(omap_io_desc, ARRAY_SIZE(omap_io_desc));
}
#if defined (CONFIG_ARCH_OMAP730) || defined (CONFIG_ARCH_OMAP850) #if defined (CONFIG_ARCH_OMAP730) || defined (CONFIG_ARCH_OMAP850)
void __init omap7xx_map_io(void) void __init omap7xx_map_io(void)
{ {
omap1_map_common_io();
iotable_init(omap7xx_io_desc, ARRAY_SIZE(omap7xx_io_desc)); iotable_init(omap7xx_io_desc, ARRAY_SIZE(omap7xx_io_desc));
} }
#endif #endif
@ -98,7 +98,6 @@ void __init omap7xx_map_io(void)
#ifdef CONFIG_ARCH_OMAP15XX #ifdef CONFIG_ARCH_OMAP15XX
void __init omap15xx_map_io(void) void __init omap15xx_map_io(void)
{ {
omap1_map_common_io();
iotable_init(omap1510_io_desc, ARRAY_SIZE(omap1510_io_desc)); iotable_init(omap1510_io_desc, ARRAY_SIZE(omap1510_io_desc));
} }
#endif #endif
@ -106,7 +105,6 @@ void __init omap15xx_map_io(void)
#if defined(CONFIG_ARCH_OMAP16XX) #if defined(CONFIG_ARCH_OMAP16XX)
void __init omap16xx_map_io(void) void __init omap16xx_map_io(void)
{ {
omap1_map_common_io();
iotable_init(omap16xx_io_desc, ARRAY_SIZE(omap16xx_io_desc)); iotable_init(omap16xx_io_desc, ARRAY_SIZE(omap16xx_io_desc));
} }
#endif #endif

21
arch/arm/mach-omap1/mcbsp.c
View File

@ -89,7 +89,6 @@ static struct omap_mcbsp_ops omap1_mcbsp_ops = {
#define OMAP1610_MCBSP2_BASE 0xfffb1000 #define OMAP1610_MCBSP2_BASE 0xfffb1000
#define OMAP1610_MCBSP3_BASE 0xe1017000 #define OMAP1610_MCBSP3_BASE 0xe1017000
#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
struct resource omap7xx_mcbsp_res[][6] = { struct resource omap7xx_mcbsp_res[][6] = {
{ {
{ {
@ -159,14 +158,7 @@ static struct omap_mcbsp_platform_data omap7xx_mcbsp_pdata[] = {
}; };
#define OMAP7XX_MCBSP_RES_SZ ARRAY_SIZE(omap7xx_mcbsp_res[1]) #define OMAP7XX_MCBSP_RES_SZ ARRAY_SIZE(omap7xx_mcbsp_res[1])
#define OMAP7XX_MCBSP_COUNT ARRAY_SIZE(omap7xx_mcbsp_res) #define OMAP7XX_MCBSP_COUNT ARRAY_SIZE(omap7xx_mcbsp_res)
#else
#define omap7xx_mcbsp_res_0 NULL
#define omap7xx_mcbsp_pdata NULL
#define OMAP7XX_MCBSP_RES_SZ 0
#define OMAP7XX_MCBSP_COUNT 0
#endif
#ifdef CONFIG_ARCH_OMAP15XX
struct resource omap15xx_mcbsp_res[][6] = { struct resource omap15xx_mcbsp_res[][6] = {
{ {
{ {
@ -266,14 +258,7 @@ static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = {
}; };
#define OMAP15XX_MCBSP_RES_SZ ARRAY_SIZE(omap15xx_mcbsp_res[1]) #define OMAP15XX_MCBSP_RES_SZ ARRAY_SIZE(omap15xx_mcbsp_res[1])
#define OMAP15XX_MCBSP_COUNT ARRAY_SIZE(omap15xx_mcbsp_res) #define OMAP15XX_MCBSP_COUNT ARRAY_SIZE(omap15xx_mcbsp_res)
#else
#define omap15xx_mcbsp_res_0 NULL
#define omap15xx_mcbsp_pdata NULL
#define OMAP15XX_MCBSP_RES_SZ 0
#define OMAP15XX_MCBSP_COUNT 0
#endif
#ifdef CONFIG_ARCH_OMAP16XX
struct resource omap16xx_mcbsp_res[][6] = { struct resource omap16xx_mcbsp_res[][6] = {
{ {
{ {
@ -373,12 +358,6 @@ static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = {
}; };
#define OMAP16XX_MCBSP_RES_SZ ARRAY_SIZE(omap16xx_mcbsp_res[1]) #define OMAP16XX_MCBSP_RES_SZ ARRAY_SIZE(omap16xx_mcbsp_res[1])
#define OMAP16XX_MCBSP_COUNT ARRAY_SIZE(omap16xx_mcbsp_res) #define OMAP16XX_MCBSP_COUNT ARRAY_SIZE(omap16xx_mcbsp_res)
#else
#define omap16xx_mcbsp_res_0 NULL
#define omap16xx_mcbsp_pdata NULL
#define OMAP16XX_MCBSP_RES_SZ 0
#define OMAP16XX_MCBSP_COUNT 0
#endif
static void omap_mcbsp_register_board_cfg(struct resource *res, int res_count, static void omap_mcbsp_register_board_cfg(struct resource *res, int res_count,
struct omap_mcbsp_platform_data *config, int size) struct omap_mcbsp_platform_data *config, int size)

7
arch/arm/mach-omap1/pm.h
View File

@ -106,13 +106,6 @@
#define OMAP7XX_IDLECT3 0xfffece24 #define OMAP7XX_IDLECT3 0xfffece24
#define OMAP7XX_IDLE_LOOP_REQUEST 0x0C00 #define OMAP7XX_IDLE_LOOP_REQUEST 0x0C00
#if !defined(CONFIG_ARCH_OMAP730) && \
!defined(CONFIG_ARCH_OMAP850) && \
!defined(CONFIG_ARCH_OMAP15XX) && \
!defined(CONFIG_ARCH_OMAP16XX)
#warning "Power management for this processor not implemented yet"
#endif
#ifndef __ASSEMBLER__ #ifndef __ASSEMBLER__
#include <linux/clk.h> #include <linux/clk.h>

2
arch/arm/mach-pxa/Kconfig
View File

@ -45,6 +45,8 @@ config MACH_PXA27X_DT
config MACH_PXA3XX_DT config MACH_PXA3XX_DT
bool "Support PXA3xx platforms from device tree" bool "Support PXA3xx platforms from device tree"
select CPU_PXA300 select CPU_PXA300
select CPU_PXA310
select CPU_PXA320
select PINCTRL select PINCTRL
select POWER_SUPPLY select POWER_SUPPLY
select PXA3xx select PXA3xx

2
arch/arm/mm/nommu.c
View File

@ -161,7 +161,7 @@ void __init paging_init(const struct machine_desc *mdesc)
mpu_setup(); mpu_setup();
/* allocate the zero page. */ /* allocate the zero page. */
zero_page = memblock_alloc(PAGE_SIZE, PAGE_SIZE); zero_page = (void *)memblock_alloc(PAGE_SIZE, PAGE_SIZE);
if (!zero_page) if (!zero_page)
panic("%s: Failed to allocate %lu bytes align=0x%lx\n", panic("%s: Failed to allocate %lu bytes align=0x%lx\n",
__func__, PAGE_SIZE, PAGE_SIZE); __func__, PAGE_SIZE, PAGE_SIZE);

1
arch/arm/mm/proc-macros.S
View File

@ -6,6 +6,7 @@
* VM_EXEC * VM_EXEC
*/ */
#include <asm/asm-offsets.h> #include <asm/asm-offsets.h>
#include <asm/pgtable.h>
#include <asm/thread_info.h> #include <asm/thread_info.h>
#ifdef CONFIG_CPU_V7M #ifdef CONFIG_CPU_V7M

18
arch/arm64/Kconfig
View File

@ -184,8 +184,6 @@ config ARM64
select HAVE_DEBUG_KMEMLEAK select HAVE_DEBUG_KMEMLEAK
select HAVE_DMA_CONTIGUOUS select HAVE_DMA_CONTIGUOUS
select HAVE_DYNAMIC_FTRACE select HAVE_DYNAMIC_FTRACE
select HAVE_DYNAMIC_FTRACE_WITH_ARGS \
if $(cc-option,-fpatchable-function-entry=2)
select FTRACE_MCOUNT_USE_PATCHABLE_FUNCTION_ENTRY \ select FTRACE_MCOUNT_USE_PATCHABLE_FUNCTION_ENTRY \
if DYNAMIC_FTRACE_WITH_ARGS if DYNAMIC_FTRACE_WITH_ARGS
select HAVE_EFFICIENT_UNALIGNED_ACCESS select HAVE_EFFICIENT_UNALIGNED_ACCESS
@ -972,6 +970,22 @@ config ARM64_ERRATUM_2457168
If unsure, say Y. If unsure, say Y.
config ARM64_ERRATUM_2645198
bool "Cortex-A715: 2645198: Workaround possible [ESR|FAR]_ELx corruption"
default y
help
This option adds the workaround for ARM Cortex-A715 erratum 2645198.
If a Cortex-A715 cpu sees a page mapping permissions change from executable
to non-executable, it may corrupt the ESR_ELx and FAR_ELx registers on the
next instruction abort caused by permission fault.
Only user-space does executable to non-executable permission transition via
mprotect() system call. Workaround the problem by doing a break-before-make
TLB invalidation, for all changes to executable user space mappings.
If unsure, say Y.
config CAVIUM_ERRATUM_22375 config CAVIUM_ERRATUM_22375
bool "Cavium erratum 22375, 24313" bool "Cavium erratum 22375, 24313"
default y default y

8
arch/arm64/boot/dts/amlogic/meson-sm1-odroid-hc4.dts
View File

@ -131,10 +131,6 @@
}; };
&usb { &usb {
phys = <&usb2_phy1>; phys = <&usb2_phy0>, <&usb2_phy1>;
phy-names = "usb2-phy1"; phy-names = "usb2-phy0", "usb2-phy1";
};
&usb2_phy0 {
status = "disabled";
}; };

2
arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts
View File

@ -110,7 +110,7 @@
&i2c0 { &i2c0 {
status = "okay"; status = "okay";
pca9547@77 { i2c-mux@77 {
compatible = "nxp,pca9547"; compatible = "nxp,pca9547";
reg = <0x77>; reg = <0x77>;
#address-cells = <1>; #address-cells = <1>;

2
arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts
View File

@ -89,7 +89,7 @@
&i2c0 { &i2c0 {
status = "okay"; status = "okay";
pca9547@77 { i2c-mux@77 {
compatible = "nxp,pca9547"; compatible = "nxp,pca9547";
reg = <0x77>; reg = <0x77>;
#address-cells = <1>; #address-cells = <1>;

2
arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts
View File

@ -88,7 +88,7 @@
&i2c0 { &i2c0 {
status = "okay"; status = "okay";
pca9547@77 { i2c-mux@77 {
compatible = "nxp,pca9547"; compatible = "nxp,pca9547";
reg = <0x77>; reg = <0x77>;
#address-cells = <1>; #address-cells = <1>;

2
arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dts
View File

@ -53,7 +53,7 @@
&i2c0 { &i2c0 {
status = "okay"; status = "okay";
i2c-switch@77 { i2c-mux@77 {
compatible = "nxp,pca9547"; compatible = "nxp,pca9547";
reg = <0x77>; reg = <0x77>;
#address-cells = <1>; #address-cells = <1>;

2
arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts
View File

@ -136,7 +136,7 @@
&i2c0 { &i2c0 {
status = "okay"; status = "okay";
i2c-switch@77 { i2c-mux@77 {
compatible = "nxp,pca9547"; compatible = "nxp,pca9547";
reg = <0x77>; reg = <0x77>;
#address-cells = <1>; #address-cells = <1>;

2
arch/arm64/boot/dts/freescale/fsl-ls1088a-ten64.dts
View File

@ -245,7 +245,7 @@
&i2c3 { &i2c3 {
status = "okay"; status = "okay";
i2c-switch@70 { i2c-mux@70 {
compatible = "nxp,pca9540"; compatible = "nxp,pca9540";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;

2
arch/arm64/boot/dts/freescale/fsl-ls208xa-qds.dtsi
View File

@ -103,7 +103,7 @@
&i2c0 { &i2c0 {
status = "okay"; status = "okay";
pca9547@77 { i2c-mux@77 {
compatible = "nxp,pca9547"; compatible = "nxp,pca9547";
reg = <0x77>; reg = <0x77>;
#address-cells = <1>; #address-cells = <1>;

2
arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi
View File

@ -44,7 +44,7 @@
&i2c0 { &i2c0 {
status = "okay"; status = "okay";
pca9547@75 { i2c-mux@75 {
compatible = "nxp,pca9547"; compatible = "nxp,pca9547";
reg = <0x75>; reg = <0x75>;
#address-cells = <1>; #address-cells = <1>;

2
arch/arm64/boot/dts/freescale/fsl-lx2160a-cex7.dtsi
View File

@ -54,7 +54,7 @@
&i2c0 { &i2c0 {
status = "okay"; status = "okay";
i2c-switch@77 { i2c-mux@77 {
compatible = "nxp,pca9547"; compatible = "nxp,pca9547";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;

2
arch/arm64/boot/dts/freescale/imx8dxl.dtsi
View File

@ -164,7 +164,7 @@
sc_pwrkey: keys { sc_pwrkey: keys {
compatible = "fsl,imx8qxp-sc-key", "fsl,imx-sc-key"; compatible = "fsl,imx8qxp-sc-key", "fsl,imx-sc-key";
linux,keycode = <KEY_POWER>; linux,keycodes = <KEY_POWER>;
wakeup-source; wakeup-source;
}; };

4
arch/arm64/boot/dts/freescale/imx8mm-beacon-baseboard.dtsi
View File

@ -120,7 +120,7 @@
&ecspi2 { &ecspi2 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_espi2>; pinctrl-0 = <&pinctrl_espi2>;
cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>; cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
status = "okay"; status = "okay";
eeprom@0 { eeprom@0 {
@ -316,7 +316,7 @@
MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x82 MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x82
MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0x82 MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0x82
MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0x82 MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0x82
MX8MM_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x41 MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0x41
>; >;
}; };

3
arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc.dts
View File

@ -88,6 +88,7 @@
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_watchdog_gpio>; pinctrl-0 = <&pinctrl_watchdog_gpio>;
compatible = "linux,wdt-gpio"; compatible = "linux,wdt-gpio";
always-running;
gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>; gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
hw_algo = "level"; hw_algo = "level";
/* Reset triggers in 2..3 seconds */ /* Reset triggers in 2..3 seconds */
@ -275,7 +276,7 @@
compatible = "rohm,bd71847"; compatible = "rohm,bd71847";
reg = <0x4b>; reg = <0x4b>;
#clock-cells = <0>; #clock-cells = <0>;
clocks = <&clk_xtal32k 0>; clocks = <&clk_xtal32k>;
clock-output-names = "clk-32k-out"; clock-output-names = "clk-32k-out";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pmic>; pinctrl-0 = <&pinctrl_pmic>;

2
arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
View File

@ -214,7 +214,7 @@
pinctrl-0 = <&pinctrl_i2c3>; pinctrl-0 = <&pinctrl_i2c3>;
status = "okay"; status = "okay";
i2cmux@70 { i2c-mux@70 {
compatible = "nxp,pca9540"; compatible = "nxp,pca9540";
reg = <0x70>; reg = <0x70>;
#address-cells = <1>; #address-cells = <1>;

2
arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h
View File

@ -602,7 +602,7 @@
#define MX8MM_IOMUXC_UART1_RXD_GPIO5_IO22 0x234 0x49C 0x000 0x5 0x0 #define MX8MM_IOMUXC_UART1_RXD_GPIO5_IO22 0x234 0x49C 0x000 0x5 0x0
#define MX8MM_IOMUXC_UART1_RXD_TPSMP_HDATA24 0x234 0x49C 0x000 0x7 0x0 #define MX8MM_IOMUXC_UART1_RXD_TPSMP_HDATA24 0x234 0x49C 0x000 0x7 0x0
#define MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX 0x238 0x4A0 0x000 0x0 0x0 #define MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX 0x238 0x4A0 0x000 0x0 0x0
#define MX8MM_IOMUXC_UART1_TXD_UART1_DTE_RX 0x238 0x4A0 0x4F4 0x0 0x0 #define MX8MM_IOMUXC_UART1_TXD_UART1_DTE_RX 0x238 0x4A0 0x4F4 0x0 0x1
#define MX8MM_IOMUXC_UART1_TXD_ECSPI3_MOSI 0x238 0x4A0 0x000 0x1 0x0 #define MX8MM_IOMUXC_UART1_TXD_ECSPI3_MOSI 0x238 0x4A0 0x000 0x1 0x0
#define MX8MM_IOMUXC_UART1_TXD_GPIO5_IO23 0x238 0x4A0 0x000 0x5 0x0 #define MX8MM_IOMUXC_UART1_TXD_GPIO5_IO23 0x238 0x4A0 0x000 0x5 0x0
#define MX8MM_IOMUXC_UART1_TXD_TPSMP_HDATA25 0x238 0x4A0 0x000 0x7 0x0 #define MX8MM_IOMUXC_UART1_TXD_TPSMP_HDATA25 0x238 0x4A0 0x000 0x7 0x0

1
arch/arm64/boot/dts/freescale/imx8mm-venice-gw72xx-0x-rs232-rts.dtso
View File

@ -33,7 +33,6 @@
pinctrl-0 = <&pinctrl_uart2>; pinctrl-0 = <&pinctrl_uart2>;
rts-gpios = <&gpio5 29 GPIO_ACTIVE_LOW>; rts-gpios = <&gpio5 29 GPIO_ACTIVE_LOW>;
cts-gpios = <&gpio5 28 GPIO_ACTIVE_LOW>; cts-gpios = <&gpio5 28 GPIO_ACTIVE_LOW>;
uart-has-rtscts;
status = "okay"; status = "okay";
}; };

1
arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx-0x-rs232-rts.dtso
View File

@ -33,7 +33,6 @@
pinctrl-0 = <&pinctrl_uart2>; pinctrl-0 = <&pinctrl_uart2>;
rts-gpios = <&gpio5 29 GPIO_ACTIVE_LOW>; rts-gpios = <&gpio5 29 GPIO_ACTIVE_LOW>;
cts-gpios = <&gpio5 28 GPIO_ACTIVE_LOW>; cts-gpios = <&gpio5 28 GPIO_ACTIVE_LOW>;
uart-has-rtscts;
status = "okay"; status = "okay";
}; };

1
arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx.dtsi
View File

@ -222,7 +222,6 @@
pinctrl-0 = <&pinctrl_uart3>, <&pinctrl_bten>; pinctrl-0 = <&pinctrl_uart3>, <&pinctrl_bten>;
cts-gpios = <&gpio5 8 GPIO_ACTIVE_LOW>; cts-gpios = <&gpio5 8 GPIO_ACTIVE_LOW>;
rts-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>; rts-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
uart-has-rtscts;
status = "okay"; status = "okay";
bluetooth { bluetooth {

4
arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts
View File

@ -733,7 +733,6 @@
dtr-gpios = <&gpio1 14 GPIO_ACTIVE_LOW>; dtr-gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
dsr-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>; dsr-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
dcd-gpios = <&gpio1 11 GPIO_ACTIVE_LOW>; dcd-gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
uart-has-rtscts;
status = "okay"; status = "okay";
}; };
@ -749,7 +748,6 @@
pinctrl-0 = <&pinctrl_uart3>, <&pinctrl_uart3_gpio>; pinctrl-0 = <&pinctrl_uart3>, <&pinctrl_uart3_gpio>;
cts-gpios = <&gpio4 10 GPIO_ACTIVE_LOW>; cts-gpios = <&gpio4 10 GPIO_ACTIVE_LOW>;
rts-gpios = <&gpio4 9 GPIO_ACTIVE_LOW>; rts-gpios = <&gpio4 9 GPIO_ACTIVE_LOW>;
uart-has-rtscts;
status = "okay"; status = "okay";
}; };
@ -758,7 +756,6 @@
pinctrl-0 = <&pinctrl_uart4>, <&pinctrl_uart4_gpio>; pinctrl-0 = <&pinctrl_uart4>, <&pinctrl_uart4_gpio>;
cts-gpios = <&gpio5 11 GPIO_ACTIVE_LOW>; cts-gpios = <&gpio5 11 GPIO_ACTIVE_LOW>;
rts-gpios = <&gpio5 12 GPIO_ACTIVE_LOW>; rts-gpios = <&gpio5 12 GPIO_ACTIVE_LOW>;
uart-has-rtscts;
status = "okay"; status = "okay";
}; };
@ -771,6 +768,7 @@
&usbotg2 { &usbotg2 {
dr_mode = "host"; dr_mode = "host";
vbus-supply = <&reg_usb2_vbus>; vbus-supply = <&reg_usb2_vbus>;
over-current-active-low;
status = "okay"; status = "okay";
}; };

3
arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts
View File

@ -664,7 +664,6 @@
pinctrl-0 = <&pinctrl_uart1>, <&pinctrl_uart1_gpio>; pinctrl-0 = <&pinctrl_uart1>, <&pinctrl_uart1_gpio>;
rts-gpios = <&gpio4 10 GPIO_ACTIVE_LOW>; rts-gpios = <&gpio4 10 GPIO_ACTIVE_LOW>;
cts-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>; cts-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>;
uart-has-rtscts;
status = "okay"; status = "okay";
}; };
@ -681,7 +680,6 @@
pinctrl-0 = <&pinctrl_uart3>, <&pinctrl_uart3_gpio>; pinctrl-0 = <&pinctrl_uart3>, <&pinctrl_uart3_gpio>;
rts-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>; rts-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
cts-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>; cts-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
uart-has-rtscts;
status = "okay"; status = "okay";
bluetooth { bluetooth {
@ -699,7 +697,6 @@
dtr-gpios = <&gpio4 3 GPIO_ACTIVE_LOW>; dtr-gpios = <&gpio4 3 GPIO_ACTIVE_LOW>;
dsr-gpios = <&gpio4 4 GPIO_ACTIVE_LOW>; dsr-gpios = <&gpio4 4 GPIO_ACTIVE_LOW>;
dcd-gpios = <&gpio4 6 GPIO_ACTIVE_LOW>; dcd-gpios = <&gpio4 6 GPIO_ACTIVE_LOW>;
uart-has-rtscts;
status = "okay"; status = "okay";
}; };

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