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ARM: dts: stm32: OP-TEE async notif interrupt for ST STM32MP15x boards

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Define the GIC interrupt (PPI 15) to be used on ST STM32MP15x boards
for OP-TEE async notif.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
This commit is contained in:
Etienne Carriere 2024-06-17 11:14:18 +02:00 committed by Alexandre Torgue
parent 0fc78aa67b
commit 3333d21af6
4 changed files with 20 additions and 0 deletions
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5
arch/arm/boot/dts/st/stm32mp157a-dk1-scmi.dts
View File

@ -62,6 +62,11 @@
reset-names = "mcu_rst", "hold_boot";
};
&optee {
interrupt-parent = <&intc>;
interrupts = <GIC_PPI 15 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
};
&rcc {
compatible = "st,stm32mp1-rcc-secure", "syscon";
clock-names = "hse", "hsi", "csi", "lse", "lsi";

5
arch/arm/boot/dts/st/stm32mp157c-dk2-scmi.dts
View File

@ -68,6 +68,11 @@
reset-names = "mcu_rst", "hold_boot";
};
&optee {
interrupt-parent = <&intc>;
interrupts = <GIC_PPI 15 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
};
&rcc {
compatible = "st,stm32mp1-rcc-secure", "syscon";
clock-names = "hse", "hsi", "csi", "lse", "lsi";

5
arch/arm/boot/dts/st/stm32mp157c-ed1-scmi.dts
View File

@ -67,6 +67,11 @@
reset-names = "mcu_rst", "hold_boot";
};
&optee {
interrupt-parent = <&intc>;
interrupts = <GIC_PPI 15 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
};
&rcc {
compatible = "st,stm32mp1-rcc-secure", "syscon";
clock-names = "hse", "hsi", "csi", "lse", "lsi";

5
arch/arm/boot/dts/st/stm32mp157c-ev1-scmi.dts
View File

@ -72,6 +72,11 @@
reset-names = "mcu_rst", "hold_boot";
};
&optee {
interrupt-parent = <&intc>;
interrupts = <GIC_PPI 15 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
};
&rcc {
compatible = "st,stm32mp1-rcc-secure", "syscon";
clock-names = "hse", "hsi", "csi", "lse", "lsi";