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net: dsa: bcm_sf2: Move IPv4 CFP processing to specific functions
Move the processing of IPv4 rules into specific functions, allowing us to clearly identify which parts are generic and which ones are not. Also create a specific function to insert a rule into the action and policer RAMs as those tend to be fairly generic. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
parent
39cdd34989
commit
3306145866
@ -112,45 +112,61 @@ static inline unsigned int bcm_sf2_cfp_rule_size(struct bcm_sf2_priv *priv)
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return priv->num_cfp_rules - 1;
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}
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static int bcm_sf2_cfp_rule_set(struct dsa_switch *ds, int port,
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struct ethtool_rx_flow_spec *fs)
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static int bcm_sf2_cfp_act_pol_set(struct bcm_sf2_priv *priv,
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unsigned int rule_index,
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unsigned int port_num,
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unsigned int queue_num)
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{
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int ret;
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u32 reg;
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/* Replace ARL derived destination with DST_MAP derived, define
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* which port and queue this should be forwarded to.
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*/
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reg = CHANGE_FWRD_MAP_IB_REP_ARL | BIT(port_num + DST_MAP_IB_SHIFT) |
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CHANGE_TC | queue_num << NEW_TC_SHIFT;
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core_writel(priv, reg, CORE_ACT_POL_DATA0);
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/* Set classification ID that needs to be put in Broadcom tag */
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core_writel(priv, rule_index << CHAIN_ID_SHIFT,
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CORE_ACT_POL_DATA1);
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core_writel(priv, 0, CORE_ACT_POL_DATA2);
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/* Configure policer RAM now */
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ret = bcm_sf2_cfp_op(priv, OP_SEL_WRITE | ACT_POL_RAM);
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if (ret) {
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pr_err("Policer entry at %d failed\n", rule_index);
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return ret;
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}
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/* Disable the policer */
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core_writel(priv, POLICER_MODE_DISABLE, CORE_RATE_METER0);
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/* Now the rate meter */
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ret = bcm_sf2_cfp_op(priv, OP_SEL_WRITE | RATE_METER_RAM);
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if (ret) {
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pr_err("Meter entry at %d failed\n", rule_index);
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return ret;
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}
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return 0;
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}
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static int bcm_sf2_cfp_ipv4_rule_set(struct bcm_sf2_priv *priv, int port,
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unsigned int port_num,
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unsigned int queue_num,
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struct ethtool_rx_flow_spec *fs)
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{
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struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds);
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struct ethtool_tcpip4_spec *v4_spec;
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const struct cfp_udf_layout *layout;
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struct ethtool_tcpip4_spec *v4_spec;
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unsigned int slice_num, rule_index;
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unsigned int queue_num, port_num;
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u8 ip_proto, ip_frag;
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u8 num_udf;
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u32 reg;
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int ret;
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/* Check for unsupported extensions */
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if ((fs->flow_type & FLOW_EXT) &&
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(fs->m_ext.vlan_etype || fs->m_ext.data[1]))
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return -EINVAL;
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if (fs->location != RX_CLS_LOC_ANY &&
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test_bit(fs->location, priv->cfp.used))
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return -EBUSY;
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if (fs->location != RX_CLS_LOC_ANY &&
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fs->location > bcm_sf2_cfp_rule_size(priv))
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return -EINVAL;
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ip_frag = be32_to_cpu(fs->m_ext.data[0]);
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/* We do not support discarding packets, check that the
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* destination port is enabled and that we are within the
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* number of ports supported by the switch
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*/
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port_num = fs->ring_cookie / SF2_NUM_EGRESS_QUEUES;
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if (fs->ring_cookie == RX_CLS_FLOW_DISC ||
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!(BIT(port_num) & ds->enabled_port_mask) ||
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port_num >= priv->hw_params.num_ports)
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return -EINVAL;
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switch (fs->flow_type & ~FLOW_EXT) {
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case TCP_V4_FLOW:
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ip_proto = IPPROTO_TCP;
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@ -164,6 +180,15 @@ static int bcm_sf2_cfp_rule_set(struct dsa_switch *ds, int port,
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return -EINVAL;
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}
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ip_frag = be32_to_cpu(fs->m_ext.data[0]);
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/* Locate the first rule available */
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if (fs->location == RX_CLS_LOC_ANY)
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rule_index = find_first_zero_bit(priv->cfp.used,
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bcm_sf2_cfp_rule_size(priv));
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else
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rule_index = fs->location;
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/* We only use one UDF slice for now */
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slice_num = 1;
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layout = &udf_tcpip4_layout;
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@ -175,6 +200,9 @@ static int bcm_sf2_cfp_rule_set(struct dsa_switch *ds, int port,
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/* Apply to all packets received through this port */
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core_writel(priv, BIT(port), CORE_CFP_DATA_PORT(7));
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/* Source port map match */
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core_writel(priv, 0xff, CORE_CFP_MASK_PORT(7));
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/* S-Tag status [31:30]
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* C-Tag status [29:28]
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* L2 framing [27:26]
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@ -241,9 +269,6 @@ static int bcm_sf2_cfp_rule_set(struct dsa_switch *ds, int port,
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SLICE_NUM(slice_num) | SLICE_VALID;
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core_writel(priv, reg, CORE_CFP_DATA_PORT(0));
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/* Source port map match */
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core_writel(priv, 0xff, CORE_CFP_MASK_PORT(7));
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/* Mask with the specific layout for IPv4 packets */
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core_writel(priv, layout->mask_value, CORE_CFP_MASK_PORT(6));
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@ -259,13 +284,6 @@ static int bcm_sf2_cfp_rule_set(struct dsa_switch *ds, int port,
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core_writel(priv, 0xffffffff, CORE_CFP_MASK_PORT(1));
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core_writel(priv, 0xffffff0f, CORE_CFP_MASK_PORT(0));
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/* Locate the first rule available */
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if (fs->location == RX_CLS_LOC_ANY)
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rule_index = find_first_zero_bit(priv->cfp.used,
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bcm_sf2_cfp_rule_size(priv));
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else
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rule_index = fs->location;
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/* Insert into TCAM now */
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bcm_sf2_cfp_rule_addr_set(priv, rule_index);
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@ -275,43 +293,10 @@ static int bcm_sf2_cfp_rule_set(struct dsa_switch *ds, int port,
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return ret;
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}
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/* Replace ARL derived destination with DST_MAP derived, define
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* which port and queue this should be forwarded to.
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*
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* We have a small oddity where Port 6 just does not have a
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* valid bit here (so we subtract by one).
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*/
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queue_num = fs->ring_cookie % SF2_NUM_EGRESS_QUEUES;
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if (port_num >= 7)
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port_num -= 1;
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reg = CHANGE_FWRD_MAP_IB_REP_ARL | BIT(port_num + DST_MAP_IB_SHIFT) |
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CHANGE_TC | queue_num << NEW_TC_SHIFT;
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core_writel(priv, reg, CORE_ACT_POL_DATA0);
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/* Set classification ID that needs to be put in Broadcom tag */
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core_writel(priv, rule_index << CHAIN_ID_SHIFT,
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CORE_ACT_POL_DATA1);
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core_writel(priv, 0, CORE_ACT_POL_DATA2);
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/* Configure policer RAM now */
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ret = bcm_sf2_cfp_op(priv, OP_SEL_WRITE | ACT_POL_RAM);
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if (ret) {
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pr_err("Policer entry at %d failed\n", rule_index);
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/* Insert into Action and policer RAMs now */
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ret = bcm_sf2_cfp_act_pol_set(priv, rule_index, port_num, queue_num);
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if (ret)
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return ret;
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}
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/* Disable the policer */
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core_writel(priv, POLICER_MODE_DISABLE, CORE_RATE_METER0);
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/* Now the rate meter */
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ret = bcm_sf2_cfp_op(priv, OP_SEL_WRITE | RATE_METER_RAM);
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if (ret) {
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pr_err("Meter entry at %d failed\n", rule_index);
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return ret;
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}
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/* Turn on CFP for this rule now */
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reg = core_readl(priv, CORE_CFP_CTL_REG);
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@ -325,6 +310,51 @@ static int bcm_sf2_cfp_rule_set(struct dsa_switch *ds, int port,
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return 0;
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}
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static int bcm_sf2_cfp_rule_set(struct dsa_switch *ds, int port,
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struct ethtool_rx_flow_spec *fs)
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{
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struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds);
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unsigned int queue_num, port_num;
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int ret;
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/* Check for unsupported extensions */
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if ((fs->flow_type & FLOW_EXT) && (fs->m_ext.vlan_etype ||
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fs->m_ext.data[1]))
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return -EINVAL;
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if (fs->location != RX_CLS_LOC_ANY &&
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test_bit(fs->location, priv->cfp.used))
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return -EBUSY;
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if (fs->location != RX_CLS_LOC_ANY &&
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fs->location > bcm_sf2_cfp_rule_size(priv))
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return -EINVAL;
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/* We do not support discarding packets, check that the
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* destination port is enabled and that we are within the
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* number of ports supported by the switch
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*/
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port_num = fs->ring_cookie / SF2_NUM_EGRESS_QUEUES;
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if (fs->ring_cookie == RX_CLS_FLOW_DISC ||
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!(BIT(port_num) & ds->enabled_port_mask) ||
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port_num >= priv->hw_params.num_ports)
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return -EINVAL;
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/*
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* We have a small oddity where Port 6 just does not have a
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* valid bit here (so we substract by one).
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*/
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queue_num = fs->ring_cookie % SF2_NUM_EGRESS_QUEUES;
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if (port_num >= 7)
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port_num -= 1;
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ret = bcm_sf2_cfp_ipv4_rule_set(priv, port, port_num, queue_num, fs);
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if (ret)
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return ret;
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return 0;
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}
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static int bcm_sf2_cfp_rule_del(struct bcm_sf2_priv *priv, int port,
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u32 loc)
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{
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@ -370,13 +400,59 @@ static void bcm_sf2_invert_masks(struct ethtool_rx_flow_spec *flow)
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flow->m_ext.data[1] ^= cpu_to_be32(~0);
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}
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static int bcm_sf2_cfp_ipv4_rule_get(struct bcm_sf2_priv *priv, int port,
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struct ethtool_tcpip4_spec *v4_spec,
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struct ethtool_tcpip4_spec *v4_m_spec)
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{
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u16 src_dst_port;
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u32 reg, ipv4;
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reg = core_readl(priv, CORE_CFP_DATA_PORT(3));
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/* src port [15:8] */
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src_dst_port = reg << 8;
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reg = core_readl(priv, CORE_CFP_DATA_PORT(2));
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/* src port [7:0] */
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src_dst_port |= (reg >> 24);
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v4_spec->pdst = cpu_to_be16(src_dst_port);
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v4_m_spec->pdst = cpu_to_be16(~0);
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v4_spec->psrc = cpu_to_be16((u16)(reg >> 8));
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v4_m_spec->psrc = cpu_to_be16(~0);
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/* IPv4 dst [15:8] */
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ipv4 = (reg & 0xff) << 8;
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reg = core_readl(priv, CORE_CFP_DATA_PORT(1));
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/* IPv4 dst [31:16] */
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ipv4 |= ((reg >> 8) & 0xffff) << 16;
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/* IPv4 dst [7:0] */
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ipv4 |= (reg >> 24) & 0xff;
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v4_spec->ip4dst = cpu_to_be32(ipv4);
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v4_m_spec->ip4dst = cpu_to_be32(~0);
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/* IPv4 src [15:8] */
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ipv4 = (reg & 0xff) << 8;
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reg = core_readl(priv, CORE_CFP_DATA_PORT(0));
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if (!(reg & SLICE_VALID))
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return -EINVAL;
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/* IPv4 src [7:0] */
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ipv4 |= (reg >> 24) & 0xff;
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/* IPv4 src [31:16] */
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ipv4 |= ((reg >> 8) & 0xffff) << 16;
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v4_spec->ip4src = cpu_to_be32(ipv4);
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v4_m_spec->ip4src = cpu_to_be32(~0);
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return 0;
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}
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static int bcm_sf2_cfp_rule_get(struct bcm_sf2_priv *priv, int port,
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struct ethtool_rxnfc *nfc, bool search)
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{
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struct ethtool_tcpip4_spec *v4_spec;
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struct ethtool_tcpip4_spec *v4_spec = NULL, *v4_m_spec;
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unsigned int queue_num;
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u16 src_dst_port;
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u32 reg, ipv4;
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u32 reg;
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int ret;
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if (!search) {
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@ -414,10 +490,12 @@ static int bcm_sf2_cfp_rule_get(struct bcm_sf2_priv *priv, int port,
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case IPPROTO_TCP:
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nfc->fs.flow_type = TCP_V4_FLOW;
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v4_spec = &nfc->fs.h_u.tcp_ip4_spec;
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v4_m_spec = &nfc->fs.m_u.tcp_ip4_spec;
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break;
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case IPPROTO_UDP:
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nfc->fs.flow_type = UDP_V4_FLOW;
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v4_spec = &nfc->fs.h_u.udp_ip4_spec;
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v4_m_spec = &nfc->fs.m_u.udp_ip4_spec;
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break;
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default:
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/* Clear to exit the search process */
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@ -426,45 +504,14 @@ static int bcm_sf2_cfp_rule_get(struct bcm_sf2_priv *priv, int port,
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return -EINVAL;
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}
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v4_spec->tos = (reg >> IPTOS_SHIFT) & IPTOS_MASK;
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nfc->fs.m_ext.data[0] = cpu_to_be32((reg >> IP_FRAG_SHIFT) & 1);
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if (v4_spec) {
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v4_spec->tos = (reg >> IPTOS_SHIFT) & IPTOS_MASK;
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ret = bcm_sf2_cfp_ipv4_rule_get(priv, port, v4_spec, v4_m_spec);
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}
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reg = core_readl(priv, CORE_CFP_DATA_PORT(3));
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/* src port [15:8] */
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src_dst_port = reg << 8;
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reg = core_readl(priv, CORE_CFP_DATA_PORT(2));
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/* src port [7:0] */
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src_dst_port |= (reg >> 24);
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v4_spec->pdst = cpu_to_be16(src_dst_port);
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nfc->fs.m_u.tcp_ip4_spec.pdst = cpu_to_be16(~0);
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v4_spec->psrc = cpu_to_be16((u16)(reg >> 8));
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nfc->fs.m_u.tcp_ip4_spec.psrc = cpu_to_be16(~0);
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/* IPv4 dst [15:8] */
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ipv4 = (reg & 0xff) << 8;
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reg = core_readl(priv, CORE_CFP_DATA_PORT(1));
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/* IPv4 dst [31:16] */
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ipv4 |= ((reg >> 8) & 0xffff) << 16;
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/* IPv4 dst [7:0] */
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ipv4 |= (reg >> 24) & 0xff;
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v4_spec->ip4dst = cpu_to_be32(ipv4);
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nfc->fs.m_u.tcp_ip4_spec.ip4dst = cpu_to_be32(~0);
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/* IPv4 src [15:8] */
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ipv4 = (reg & 0xff) << 8;
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reg = core_readl(priv, CORE_CFP_DATA_PORT(0));
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if (!(reg & SLICE_VALID))
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return -EINVAL;
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/* IPv4 src [7:0] */
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ipv4 |= (reg >> 24) & 0xff;
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/* IPv4 src [31:16] */
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ipv4 |= ((reg >> 8) & 0xffff) << 16;
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v4_spec->ip4src = cpu_to_be32(ipv4);
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nfc->fs.m_u.tcp_ip4_spec.ip4src = cpu_to_be32(~0);
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if (ret)
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return ret;
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/* Read last to avoid next entry clobbering the results during search
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* operations
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