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drm/exynos: add cursor plane support

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Set one of the planes for each crtc driver as a cursor plane enabled
window managers to fully work on exynos.

Signed-off-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
This commit is contained in:
Gustavo Padovan 2015-09-04 19:05:57 -03:00 committed by Inki Dae
parent 5d3d099574
commit 323db0ed7d
7 changed files with 23 additions and 10 deletions
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4
drivers/gpu/drm/exynos/exynos5433_drm_decon.c
View File

@ -24,6 +24,7 @@
#include "exynos_drm_iommu.h" #include "exynos_drm_iommu.h"
#define WINDOWS_NR 3 #define WINDOWS_NR 3
#define CURSOR_WIN 2
#define MIN_FB_WIDTH_FOR_16WORD_BURST 128 #define MIN_FB_WIDTH_FOR_16WORD_BURST 128
struct decon_context { struct decon_context {
@ -500,8 +501,7 @@ static int decon_bind(struct device *dev, struct device *master, void *data)
ctx->pipe = priv->pipe++; ctx->pipe = priv->pipe++;
for (zpos = 0; zpos < WINDOWS_NR; zpos++) { for (zpos = 0; zpos < WINDOWS_NR; zpos++) {
type = (zpos == DEFAULT_WIN) ? DRM_PLANE_TYPE_PRIMARY : type = exynos_plane_get_type(zpos, CURSOR_WIN);
DRM_PLANE_TYPE_OVERLAY;
ret = exynos_plane_init(drm_dev, &ctx->planes[zpos], ret = exynos_plane_init(drm_dev, &ctx->planes[zpos],
1 << ctx->pipe, type, decon_formats, 1 << ctx->pipe, type, decon_formats,
ARRAY_SIZE(decon_formats), zpos); ARRAY_SIZE(decon_formats), zpos);

4
drivers/gpu/drm/exynos/exynos7_drm_decon.c
View File

@ -40,6 +40,7 @@
#define MIN_FB_WIDTH_FOR_16WORD_BURST 128 #define MIN_FB_WIDTH_FOR_16WORD_BURST 128
#define WINDOWS_NR 2 #define WINDOWS_NR 2
#define CURSOR_WIN 1
struct decon_context { struct decon_context {
struct device *dev; struct device *dev;
@ -689,8 +690,7 @@ static int decon_bind(struct device *dev, struct device *master, void *data)
} }
for (zpos = 0; zpos < WINDOWS_NR; zpos++) { for (zpos = 0; zpos < WINDOWS_NR; zpos++) {
type = (zpos == DEFAULT_WIN) ? DRM_PLANE_TYPE_PRIMARY : type = exynos_plane_get_type(zpos, CURSOR_WIN);
DRM_PLANE_TYPE_OVERLAY;
ret = exynos_plane_init(drm_dev, &ctx->planes[zpos], ret = exynos_plane_init(drm_dev, &ctx->planes[zpos],
1 << ctx->pipe, type, decon_formats, 1 << ctx->pipe, type, decon_formats,
ARRAY_SIZE(decon_formats), zpos); ARRAY_SIZE(decon_formats), zpos);

4
drivers/gpu/drm/exynos/exynos_drm_fimd.c
View File

@ -87,6 +87,7 @@
/* FIMD has totally five hardware windows. */ /* FIMD has totally five hardware windows. */
#define WINDOWS_NR 5 #define WINDOWS_NR 5
#define CURSOR_WIN 4
struct fimd_driver_data { struct fimd_driver_data {
unsigned int timing_base; unsigned int timing_base;
@ -948,8 +949,7 @@ static int fimd_bind(struct device *dev, struct device *master, void *data)
ctx->pipe = priv->pipe++; ctx->pipe = priv->pipe++;
for (zpos = 0; zpos < WINDOWS_NR; zpos++) { for (zpos = 0; zpos < WINDOWS_NR; zpos++) {
type = (zpos == DEFAULT_WIN) ? DRM_PLANE_TYPE_PRIMARY : type = exynos_plane_get_type(zpos, CURSOR_WIN);
DRM_PLANE_TYPE_OVERLAY;
ret = exynos_plane_init(drm_dev, &ctx->planes[zpos], ret = exynos_plane_init(drm_dev, &ctx->planes[zpos],
1 << ctx->pipe, type, fimd_formats, 1 << ctx->pipe, type, fimd_formats,
ARRAY_SIZE(fimd_formats), zpos); ARRAY_SIZE(fimd_formats), zpos);

11
drivers/gpu/drm/exynos/exynos_drm_plane.c
View File

@ -208,6 +208,17 @@ static void exynos_plane_attach_zpos_property(struct drm_plane *plane,
drm_object_attach_property(&plane->base, prop, zpos); drm_object_attach_property(&plane->base, prop, zpos);
} }
enum drm_plane_type exynos_plane_get_type(unsigned int zpos,
unsigned int cursor_win)
{
if (zpos == DEFAULT_WIN)
return DRM_PLANE_TYPE_PRIMARY;
else if (zpos == cursor_win)
return DRM_PLANE_TYPE_CURSOR;
else
return DRM_PLANE_TYPE_OVERLAY;
}
int exynos_plane_init(struct drm_device *dev, int exynos_plane_init(struct drm_device *dev,
struct exynos_drm_plane *exynos_plane, struct exynos_drm_plane *exynos_plane,
unsigned long possible_crtcs, enum drm_plane_type type, unsigned long possible_crtcs, enum drm_plane_type type,

2
drivers/gpu/drm/exynos/exynos_drm_plane.h
View File

@ -9,6 +9,8 @@
* *
*/ */
enum drm_plane_type exynos_plane_get_type(unsigned int zpos,
unsigned int cursor_win);
int exynos_plane_init(struct drm_device *dev, int exynos_plane_init(struct drm_device *dev,
struct exynos_drm_plane *exynos_plane, struct exynos_drm_plane *exynos_plane,
unsigned long possible_crtcs, enum drm_plane_type type, unsigned long possible_crtcs, enum drm_plane_type type,

4
drivers/gpu/drm/exynos/exynos_drm_vidi.c
View File

@ -29,6 +29,7 @@
/* vidi has totally three virtual windows. */ /* vidi has totally three virtual windows. */
#define WINDOWS_NR 3 #define WINDOWS_NR 3
#define CURSOR_WIN 2
#define ctx_from_connector(c) container_of(c, struct vidi_context, \ #define ctx_from_connector(c) container_of(c, struct vidi_context, \
connector) connector)
@ -445,8 +446,7 @@ static int vidi_bind(struct device *dev, struct device *master, void *data)
vidi_ctx_initialize(ctx, drm_dev); vidi_ctx_initialize(ctx, drm_dev);
for (zpos = 0; zpos < WINDOWS_NR; zpos++) { for (zpos = 0; zpos < WINDOWS_NR; zpos++) {
type = (zpos == DEFAULT_WIN) ? DRM_PLANE_TYPE_PRIMARY : type = exynos_plane_get_type(zpos, CURSOR_WIN);
DRM_PLANE_TYPE_OVERLAY;
ret = exynos_plane_init(drm_dev, &ctx->planes[zpos], ret = exynos_plane_init(drm_dev, &ctx->planes[zpos],
1 << ctx->pipe, type, formats, 1 << ctx->pipe, type, formats,
ARRAY_SIZE(formats), zpos); ARRAY_SIZE(formats), zpos);

4
drivers/gpu/drm/exynos/exynos_mixer.c
View File

@ -43,6 +43,7 @@
#define MIXER_WIN_NR 3 #define MIXER_WIN_NR 3
#define VP_DEFAULT_WIN 2 #define VP_DEFAULT_WIN 2
#define CURSOR_WIN 1
/* The pixelformats that are natively supported by the mixer. */ /* The pixelformats that are natively supported by the mixer. */
#define MXR_FORMAT_RGB565 4 #define MXR_FORMAT_RGB565 4
@ -1196,8 +1197,6 @@ static int mixer_bind(struct device *dev, struct device *manager, void *data)
const uint32_t *formats; const uint32_t *formats;
unsigned int fcount; unsigned int fcount;
type = (zpos == DEFAULT_WIN) ? DRM_PLANE_TYPE_PRIMARY :
DRM_PLANE_TYPE_OVERLAY;
if (zpos < VP_DEFAULT_WIN) { if (zpos < VP_DEFAULT_WIN) {
formats = mixer_formats; formats = mixer_formats;
fcount = ARRAY_SIZE(mixer_formats); fcount = ARRAY_SIZE(mixer_formats);
@ -1206,6 +1205,7 @@ static int mixer_bind(struct device *dev, struct device *manager, void *data)
fcount = ARRAY_SIZE(vp_formats); fcount = ARRAY_SIZE(vp_formats);
} }
type = exynos_plane_get_type(zpos, CURSOR_WIN);
ret = exynos_plane_init(drm_dev, &ctx->planes[zpos], ret = exynos_plane_init(drm_dev, &ctx->planes[zpos],
1 << ctx->pipe, type, formats, fcount, 1 << ctx->pipe, type, formats, fcount,
zpos); zpos);