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drm/i915: Refactor confusing __intel_gt_reset()
__intel_gt_reset() is really for resetting engines though the name might suggest something else. So add a helper function to remove confusions with no functional changes. v2: Move intel_gt_reset_all_engines() next to intel_gt_reset_engine() to make diff simple(John) Cc: John Harrison <john.c.harrison@intel.com> Signed-off-by: Nirmoy Das <nirmoy.das@intel.com> Reviewed-by: John Harrison <John.C.Harrison@Intel.com> Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com> Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240422201951.633-1-nirmoy.das@intel.com
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@ -679,7 +679,7 @@ void intel_engines_release(struct intel_gt *gt)
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*/
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GEM_BUG_ON(intel_gt_pm_is_awake(gt));
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if (!INTEL_INFO(gt->i915)->gpu_reset_clobbers_display)
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__intel_gt_reset(gt, ALL_ENGINES);
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intel_gt_reset_all_engines(gt);
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/* Decouple the backend; but keep the layout for late GPU resets */
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for_each_engine(engine, gt, id) {
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@ -2898,7 +2898,7 @@ static void enable_error_interrupt(struct intel_engine_cs *engine)
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drm_err(&engine->i915->drm,
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"engine '%s' resumed still in error: %08x\n",
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engine->name, status);
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__intel_gt_reset(engine->gt, engine->mask);
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intel_gt_reset_engine(engine);
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}
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/*
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@ -832,7 +832,7 @@ void intel_gt_driver_unregister(struct intel_gt *gt)
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/* Scrub all HW state upon release */
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with_intel_runtime_pm(gt->uncore->rpm, wakeref)
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__intel_gt_reset(gt, ALL_ENGINES);
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intel_gt_reset_all_engines(gt);
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}
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void intel_gt_driver_release(struct intel_gt *gt)
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@ -159,7 +159,7 @@ static bool reset_engines(struct intel_gt *gt)
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if (INTEL_INFO(gt->i915)->gpu_reset_clobbers_display)
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return false;
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return __intel_gt_reset(gt, ALL_ENGINES) == 0;
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return intel_gt_reset_all_engines(gt) == 0;
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}
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static void gt_sanitize(struct intel_gt *gt, bool force)
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@ -764,7 +764,7 @@ wa_14015076503_end(struct intel_gt *gt, intel_engine_mask_t engine_mask)
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HECI_H_GS1_ER_PREP, 0);
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}
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int __intel_gt_reset(struct intel_gt *gt, intel_engine_mask_t engine_mask)
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static int __intel_gt_reset(struct intel_gt *gt, intel_engine_mask_t engine_mask)
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{
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const int retries = engine_mask == ALL_ENGINES ? RESET_MAX_RETRIES : 1;
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reset_func reset;
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@ -978,7 +978,7 @@ static void __intel_gt_set_wedged(struct intel_gt *gt)
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/* Even if the GPU reset fails, it should still stop the engines */
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if (!INTEL_INFO(gt->i915)->gpu_reset_clobbers_display)
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__intel_gt_reset(gt, ALL_ENGINES);
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intel_gt_reset_all_engines(gt);
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for_each_engine(engine, gt, id)
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engine->submit_request = nop_submit_request;
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@ -1088,7 +1088,7 @@ static bool __intel_gt_unset_wedged(struct intel_gt *gt)
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/* We must reset pending GPU events before restoring our submission */
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ok = !HAS_EXECLISTS(gt->i915); /* XXX better agnosticism desired */
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if (!INTEL_INFO(gt->i915)->gpu_reset_clobbers_display)
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ok = __intel_gt_reset(gt, ALL_ENGINES) == 0;
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ok = intel_gt_reset_all_engines(gt) == 0;
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if (!ok) {
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/*
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* Warn CI about the unrecoverable wedged condition.
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@ -1132,10 +1132,10 @@ static int do_reset(struct intel_gt *gt, intel_engine_mask_t stalled_mask)
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{
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int err, i;
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err = __intel_gt_reset(gt, ALL_ENGINES);
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err = intel_gt_reset_all_engines(gt);
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for (i = 0; err && i < RESET_MAX_RETRIES; i++) {
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msleep(10 * (i + 1));
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err = __intel_gt_reset(gt, ALL_ENGINES);
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err = intel_gt_reset_all_engines(gt);
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}
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if (err)
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return err;
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@ -1269,7 +1269,30 @@ error:
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goto finish;
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}
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static int intel_gt_reset_engine(struct intel_engine_cs *engine)
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/**
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* intel_gt_reset_all_engines() - Reset all engines in the given gt.
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* @gt: the GT to reset all engines for.
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*
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* This function resets all engines within the given gt.
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*
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* Returns:
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* Zero on success, negative error code on failure.
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*/
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int intel_gt_reset_all_engines(struct intel_gt *gt)
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{
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return __intel_gt_reset(gt, ALL_ENGINES);
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}
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/**
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* intel_gt_reset_engine() - Reset a specific engine within a gt.
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* @engine: engine to be reset.
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*
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* This function resets the specified engine within a gt.
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*
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* Returns:
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* Zero on success, negative error code on failure.
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*/
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int intel_gt_reset_engine(struct intel_engine_cs *engine)
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{
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return __intel_gt_reset(engine->gt, engine->mask);
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}
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@ -54,7 +54,8 @@ int intel_gt_terminally_wedged(struct intel_gt *gt);
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void intel_gt_set_wedged_on_init(struct intel_gt *gt);
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void intel_gt_set_wedged_on_fini(struct intel_gt *gt);
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int __intel_gt_reset(struct intel_gt *gt, intel_engine_mask_t engine_mask);
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int intel_gt_reset_engine(struct intel_engine_cs *engine);
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int intel_gt_reset_all_engines(struct intel_gt *gt);
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int intel_reset_guc(struct intel_gt *gt);
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@ -281,7 +281,7 @@ static int igt_atomic_reset(void *arg)
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awake = reset_prepare(gt);
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p->critical_section_begin();
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err = __intel_gt_reset(gt, ALL_ENGINES);
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err = intel_gt_reset_all_engines(gt);
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p->critical_section_end();
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reset_finish(gt, awake);
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@ -202,7 +202,7 @@ static void sanitize_gpu(struct drm_i915_private *i915)
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unsigned int i;
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for_each_gt(gt, i915, i)
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__intel_gt_reset(gt, ALL_ENGINES);
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intel_gt_reset_all_engines(gt);
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}
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}
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