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x86/sev-es: Adjust #VC IST Stack on entering NMI handler
When an NMI hits in the #VC handler entry code before it has switched to another stack, any subsequent #VC exception in the NMI code-path will overwrite the interrupted #VC handler's stack. Make sure this doesn't happen by explicitly adjusting the #VC IST entry in the NMI handler for the time it can cause #VC exceptions. [ bp: Touchups, spelling fixes. ] Signed-off-by: Joerg Roedel <jroedel@suse.de> Signed-off-by: Borislav Petkov <bp@suse.de> Link: https://lkml.kernel.org/r/20200907131613.12703-44-joro@8bytes.org
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02772fb9b6
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@ -78,4 +78,23 @@ extern void vc_no_ghcb(void);
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extern void vc_boot_ghcb(void);
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extern bool handle_vc_boot_ghcb(struct pt_regs *regs);
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#ifdef CONFIG_AMD_MEM_ENCRYPT
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extern struct static_key_false sev_es_enable_key;
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extern void __sev_es_ist_enter(struct pt_regs *regs);
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extern void __sev_es_ist_exit(void);
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static __always_inline void sev_es_ist_enter(struct pt_regs *regs)
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{
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if (static_branch_unlikely(&sev_es_enable_key))
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__sev_es_ist_enter(regs);
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}
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static __always_inline void sev_es_ist_exit(void)
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{
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if (static_branch_unlikely(&sev_es_enable_key))
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__sev_es_ist_exit();
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}
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#else
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static inline void sev_es_ist_enter(struct pt_regs *regs) { }
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static inline void sev_es_ist_exit(void) { }
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#endif
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#endif
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@ -33,6 +33,7 @@
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#include <asm/reboot.h>
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#include <asm/cache.h>
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#include <asm/nospec-branch.h>
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#include <asm/sev-es.h>
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#define CREATE_TRACE_POINTS
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#include <trace/events/nmi.h>
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@ -488,6 +489,12 @@ DEFINE_IDTENTRY_RAW(exc_nmi)
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this_cpu_write(nmi_cr2, read_cr2());
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nmi_restart:
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/*
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* Needs to happen before DR7 is accessed, because the hypervisor can
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* intercept DR7 reads/writes, turning those into #VC exceptions.
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*/
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sev_es_ist_enter(regs);
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this_cpu_write(nmi_dr7, local_db_save());
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irq_state = idtentry_enter_nmi(regs);
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@ -501,6 +508,8 @@ nmi_restart:
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local_db_restore(this_cpu_read(nmi_dr7));
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sev_es_ist_exit();
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if (unlikely(this_cpu_read(nmi_cr2) != read_cr2()))
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write_cr2(this_cpu_read(nmi_cr2));
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if (this_cpu_dec_return(nmi_state))
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@ -51,6 +51,7 @@ struct sev_es_runtime_data {
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};
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static DEFINE_PER_CPU(struct sev_es_runtime_data*, runtime_data);
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DEFINE_STATIC_KEY_FALSE(sev_es_enable_key);
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static void __init setup_vc_stacks(int cpu)
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{
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@ -73,6 +74,55 @@ static void __init setup_vc_stacks(int cpu)
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cea_set_pte((void *)vaddr, pa, PAGE_KERNEL);
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}
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static __always_inline bool on_vc_stack(unsigned long sp)
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{
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return ((sp >= __this_cpu_ist_bottom_va(VC)) && (sp < __this_cpu_ist_top_va(VC)));
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}
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/*
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* This function handles the case when an NMI is raised in the #VC exception
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* handler entry code. In this case, the IST entry for #VC must be adjusted, so
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* that any subsequent #VC exception will not overwrite the stack contents of the
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* interrupted #VC handler.
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*
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* The IST entry is adjusted unconditionally so that it can be also be
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* unconditionally adjusted back in sev_es_ist_exit(). Otherwise a nested
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* sev_es_ist_exit() call may adjust back the IST entry too early.
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*/
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void noinstr __sev_es_ist_enter(struct pt_regs *regs)
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{
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unsigned long old_ist, new_ist;
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/* Read old IST entry */
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old_ist = __this_cpu_read(cpu_tss_rw.x86_tss.ist[IST_INDEX_VC]);
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/* Make room on the IST stack */
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if (on_vc_stack(regs->sp))
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new_ist = ALIGN_DOWN(regs->sp, 8) - sizeof(old_ist);
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else
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new_ist = old_ist - sizeof(old_ist);
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/* Store old IST entry */
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*(unsigned long *)new_ist = old_ist;
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/* Set new IST entry */
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this_cpu_write(cpu_tss_rw.x86_tss.ist[IST_INDEX_VC], new_ist);
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}
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void noinstr __sev_es_ist_exit(void)
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{
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unsigned long ist;
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/* Read IST entry */
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ist = __this_cpu_read(cpu_tss_rw.x86_tss.ist[IST_INDEX_VC]);
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if (WARN_ON(ist == __this_cpu_ist_top_va(VC)))
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return;
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/* Read back old IST entry and write it to the TSS */
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this_cpu_write(cpu_tss_rw.x86_tss.ist[IST_INDEX_VC], *(unsigned long *)ist);
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}
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/* Needed in vc_early_forward_exception */
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void do_early_exception(struct pt_regs *regs, int trapnr);
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@ -277,6 +327,9 @@ void __init sev_es_init_vc_handling(void)
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if (!sev_es_active())
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return;
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/* Enable SEV-ES special handling */
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static_branch_enable(&sev_es_enable_key);
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/* Initialize per-cpu GHCB pages */
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for_each_possible_cpu(cpu) {
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alloc_runtime_data(cpu);
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