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riscv: Enable HAVE_ARCH_HUGE_VMAP for 64BIT
This sets the HAVE_ARCH_HUGE_VMAP option, and defines the required page table functions. With this feature, ioremap area will be mapped with huge page granularity according to its actual size. This feature can be disabled by kernel parameter "nohugeiomap". Signed-off-by: Liu Shixin <liushixin2@huawei.com> Reviewed-by: Björn Töpel <bjorn@kernel.org> Tested-by: Björn Töpel <bjorn@kernel.org> Link: https://lore.kernel.org/r/20221012120038.1034354-2-liushixin2@huawei.com [Palmer: minor formatting] Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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@ -21,7 +21,7 @@
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| openrisc: | TODO |
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| parisc: | TODO |
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| powerpc: | ok |
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| riscv: | TODO |
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| riscv: | ok |
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| s390: | TODO |
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| sh: | TODO |
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| sparc: | TODO |
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@ -72,6 +72,7 @@ config RISCV
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select GENERIC_VDSO_TIME_NS if HAVE_GENERIC_VDSO
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select HARDIRQS_SW_RESEND
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select HAVE_ARCH_AUDITSYSCALL
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select HAVE_ARCH_HUGE_VMAP if MMU && 64BIT && !XIP_KERNEL
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select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL
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select HAVE_ARCH_JUMP_LABEL_RELATIVE if !XIP_KERNEL
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select HAVE_ARCH_KASAN if MMU && 64BIT
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@ -1,4 +1,22 @@
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#ifndef _ASM_RISCV_VMALLOC_H
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#define _ASM_RISCV_VMALLOC_H
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#ifdef CONFIG_HAVE_ARCH_HUGE_VMAP
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#define IOREMAP_MAX_ORDER (PUD_SHIFT)
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#define arch_vmap_pud_supported arch_vmap_pud_supported
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static inline bool arch_vmap_pud_supported(pgprot_t prot)
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{
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return true;
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}
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#define arch_vmap_pmd_supported arch_vmap_pmd_supported
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static inline bool arch_vmap_pmd_supported(pgprot_t prot)
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{
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return true;
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}
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#endif
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#endif /* _ASM_RISCV_VMALLOC_H */
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@ -13,6 +13,7 @@ obj-y += extable.o
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obj-$(CONFIG_MMU) += fault.o pageattr.o
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obj-y += cacheflush.o
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obj-y += context.o
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obj-y += pgtable.o
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ifeq ($(CONFIG_MMU),y)
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obj-$(CONFIG_SMP) += tlbflush.o
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83
arch/riscv/mm/pgtable.c
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83
arch/riscv/mm/pgtable.c
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@ -0,0 +1,83 @@
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// SPDX-License-Identifier: GPL-2.0
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#include <asm/pgalloc.h>
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#include <linux/gfp.h>
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#include <linux/kernel.h>
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#include <linux/pgtable.h>
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#ifdef CONFIG_HAVE_ARCH_HUGE_VMAP
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int p4d_set_huge(p4d_t *p4d, phys_addr_t addr, pgprot_t prot)
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{
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return 0;
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}
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void p4d_clear_huge(p4d_t *p4d)
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{
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}
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int pud_set_huge(pud_t *pud, phys_addr_t phys, pgprot_t prot)
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{
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pud_t new_pud = pfn_pud(__phys_to_pfn(phys), prot);
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set_pud(pud, new_pud);
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return 1;
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}
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int pud_clear_huge(pud_t *pud)
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{
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if (!pud_leaf(READ_ONCE(*pud)))
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return 0;
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pud_clear(pud);
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return 1;
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}
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int pud_free_pmd_page(pud_t *pud, unsigned long addr)
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{
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pmd_t *pmd = pud_pgtable(*pud);
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int i;
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pud_clear(pud);
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flush_tlb_kernel_range(addr, addr + PUD_SIZE);
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for (i = 0; i < PTRS_PER_PMD; i++) {
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if (!pmd_none(pmd[i])) {
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pte_t *pte = (pte_t *)pmd_page_vaddr(pmd[i]);
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pte_free_kernel(NULL, pte);
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}
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}
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pmd_free(NULL, pmd);
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return 1;
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}
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int pmd_set_huge(pmd_t *pmd, phys_addr_t phys, pgprot_t prot)
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{
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pmd_t new_pmd = pfn_pmd(__phys_to_pfn(phys), prot);
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set_pmd(pmd, new_pmd);
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return 1;
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}
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int pmd_clear_huge(pmd_t *pmd)
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{
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if (!pmd_leaf(READ_ONCE(*pmd)))
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return 0;
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pmd_clear(pmd);
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return 1;
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}
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int pmd_free_pte_page(pmd_t *pmd, unsigned long addr)
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{
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pte_t *pte = (pte_t *)pmd_page_vaddr(*pmd);
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pmd_clear(pmd);
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flush_tlb_kernel_range(addr, addr + PMD_SIZE);
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pte_free_kernel(NULL, pte);
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return 1;
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}
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#endif /* CONFIG_HAVE_ARCH_HUGE_VMAP */
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