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MIPS: Fix core number detection for MT cores
In cores which implement the MT ASE, the CPUNum in the EBase register is a concatenation of the core number & the VPE ID within that core. In order to retrieve the correct core number CPUNum must be shifted appropriately to remove the VPE ID bits. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6666/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -23,6 +23,7 @@
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#include <asm/cpu-type.h>
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#include <asm/fpu.h>
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#include <asm/mipsregs.h>
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#include <asm/mipsmtregs.h>
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#include <asm/msa.h>
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#include <asm/watch.h>
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#include <asm/elf.h>
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@ -421,8 +422,11 @@ static void decode_configs(struct cpuinfo_mips *c)
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mips_probe_watch_registers(c);
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#ifndef CONFIG_MIPS_CPS
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if (cpu_has_mips_r2)
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if (cpu_has_mips_r2) {
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c->core = read_c0_ebase() & 0x3ff;
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if (cpu_has_mipsmt)
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c->core >>= fls(core_nvpes()) - 1;
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}
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#endif
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}
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