pinctrl: mvebu: constify mvebu_mpp_ctrl structures

As the mvebu_mpp_ctrl structures contain function pointers, it is
preferable for these to be made read-only to prevent the function
pointers being modified.  So make these const.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Russell King 2017-01-13 11:03:15 +00:00 committed by Linus Walleij
parent a61266ebdf
commit 30be3fb9b8
10 changed files with 16 additions and 16 deletions

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@ -384,7 +384,7 @@ static const struct of_device_id armada_370_pinctrl_of_match[] = {
{ },
};
static struct mvebu_mpp_ctrl mv88f6710_mpp_controls[] = {
static const struct mvebu_mpp_ctrl mv88f6710_mpp_controls[] = {
MPP_FUNC_CTRL(0, 65, NULL, armada_370_mpp_ctrl),
};

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@ -402,7 +402,7 @@ static const struct of_device_id armada_375_pinctrl_of_match[] = {
{ },
};
static struct mvebu_mpp_ctrl mv88f6720_mpp_controls[] = {
static const struct mvebu_mpp_ctrl mv88f6720_mpp_controls[] = {
MPP_FUNC_CTRL(0, 69, NULL, armada_375_mpp_ctrl),
};

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@ -409,7 +409,7 @@ static const struct of_device_id armada_38x_pinctrl_of_match[] = {
{ },
};
static struct mvebu_mpp_ctrl armada_38x_mpp_controls[] = {
static const struct mvebu_mpp_ctrl armada_38x_mpp_controls[] = {
MPP_FUNC_CTRL(0, 59, NULL, armada_38x_mpp_ctrl),
};

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@ -391,7 +391,7 @@ static const struct of_device_id armada_39x_pinctrl_of_match[] = {
{ },
};
static struct mvebu_mpp_ctrl armada_39x_mpp_controls[] = {
static const struct mvebu_mpp_ctrl armada_39x_mpp_controls[] = {
MPP_FUNC_CTRL(0, 59, NULL, armada_39x_mpp_ctrl),
};

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@ -378,7 +378,7 @@ static const struct of_device_id armada_xp_pinctrl_of_match[] = {
{ },
};
static struct mvebu_mpp_ctrl mv78230_mpp_controls[] = {
static const struct mvebu_mpp_ctrl mv78230_mpp_controls[] = {
MPP_FUNC_CTRL(0, 48, NULL, armada_xp_mpp_ctrl),
};
@ -387,7 +387,7 @@ static struct pinctrl_gpio_range mv78230_mpp_gpio_ranges[] = {
MPP_GPIO_RANGE(1, 32, 32, 17),
};
static struct mvebu_mpp_ctrl mv78260_mpp_controls[] = {
static const struct mvebu_mpp_ctrl mv78260_mpp_controls[] = {
MPP_FUNC_CTRL(0, 66, NULL, armada_xp_mpp_ctrl),
};
@ -397,7 +397,7 @@ static struct pinctrl_gpio_range mv78260_mpp_gpio_ranges[] = {
MPP_GPIO_RANGE(2, 64, 64, 3),
};
static struct mvebu_mpp_ctrl mv78460_mpp_controls[] = {
static const struct mvebu_mpp_ctrl mv78460_mpp_controls[] = {
MPP_FUNC_CTRL(0, 66, NULL, armada_xp_mpp_ctrl),
};

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@ -354,7 +354,7 @@ static int dove_twsi_ctrl_set(unsigned pid, unsigned long config)
return 0;
}
static struct mvebu_mpp_ctrl dove_mpp_controls[] = {
static const struct mvebu_mpp_ctrl dove_mpp_controls[] = {
MPP_FUNC_CTRL(0, 15, NULL, dove_pmu_mpp_ctrl),
MPP_FUNC_CTRL(16, 23, NULL, dove_mpp_ctrl),
MPP_FUNC_CTRL(24, 39, "mpp_camera", dove_mpp4_ctrl),

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@ -370,7 +370,7 @@ static struct mvebu_mpp_mode mv88f6xxx_mpp_modes[] = {
MPP_VAR_FUNCTION(0xb, "lcd", "d17", V(0, 0, 0, 0, 1, 0))),
};
static struct mvebu_mpp_ctrl mv88f6180_mpp_controls[] = {
static const struct mvebu_mpp_ctrl mv88f6180_mpp_controls[] = {
MPP_FUNC_CTRL(0, 44, NULL, kirkwood_mpp_ctrl),
};
@ -379,7 +379,7 @@ static struct pinctrl_gpio_range mv88f6180_gpio_ranges[] = {
MPP_GPIO_RANGE(1, 35, 35, 10),
};
static struct mvebu_mpp_ctrl mv88f619x_mpp_controls[] = {
static const struct mvebu_mpp_ctrl mv88f619x_mpp_controls[] = {
MPP_FUNC_CTRL(0, 35, NULL, kirkwood_mpp_ctrl),
};
@ -388,7 +388,7 @@ static struct pinctrl_gpio_range mv88f619x_gpio_ranges[] = {
MPP_GPIO_RANGE(1, 32, 32, 4),
};
static struct mvebu_mpp_ctrl mv88f628x_mpp_controls[] = {
static const struct mvebu_mpp_ctrl mv88f628x_mpp_controls[] = {
MPP_FUNC_CTRL(0, 49, NULL, kirkwood_mpp_ctrl),
};

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@ -38,7 +38,7 @@ struct mvebu_pinctrl_function {
struct mvebu_pinctrl_group {
const char *name;
struct mvebu_mpp_ctrl *ctrl;
const struct mvebu_mpp_ctrl *ctrl;
struct mvebu_mpp_ctrl_setting *settings;
unsigned num_settings;
unsigned gid;
@ -576,7 +576,7 @@ int mvebu_pinctrl_probe(struct platform_device *pdev)
pctl->num_groups = 0;
pctl->desc.npins = 0;
for (n = 0; n < soc->ncontrols; n++) {
struct mvebu_mpp_ctrl *ctrl = &soc->controls[n];
const struct mvebu_mpp_ctrl *ctrl = &soc->controls[n];
pctl->desc.npins += ctrl->npins;
/* initialize control's pins[] array */
@ -620,7 +620,7 @@ int mvebu_pinctrl_probe(struct platform_device *pdev)
/* assign mpp controls to groups */
gid = 0;
for (n = 0; n < soc->ncontrols; n++) {
struct mvebu_mpp_ctrl *ctrl = &soc->controls[n];
const struct mvebu_mpp_ctrl *ctrl = &soc->controls[n];
pctl->groups[gid].gid = gid;
pctl->groups[gid].ctrl = ctrl;
pctl->groups[gid].name = ctrl->name;

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@ -105,7 +105,7 @@ struct mvebu_mpp_mode {
*/
struct mvebu_pinctrl_soc_info {
u8 variant;
struct mvebu_mpp_ctrl *controls;
const struct mvebu_mpp_ctrl *controls;
int ncontrols;
struct mvebu_mpp_mode *modes;
int nmodes;

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@ -161,7 +161,7 @@ static struct mvebu_mpp_mode orion_mpp_modes[] = {
MPP_VAR_FUNCTION(0x5, "gpio", NULL, V_5182)),
};
static struct mvebu_mpp_ctrl orion_mpp_controls[] = {
static const struct mvebu_mpp_ctrl orion_mpp_controls[] = {
MPP_FUNC_CTRL(0, 19, NULL, orion_mpp_ctrl),
};