Minki/linux
1
0
Fork 1
mirror of https://github.com/torvalds/linux.git synced 2024-11-28 07:01:32 +00:00
Code Issues Packages Projects Releases Wiki Activity

x86/entry/64: Use PUSH_AND_CLEAN_REGS in more cases

Browse Source 
entry_SYSCALL_64_after_hwframe() and nmi() can be converted to use
PUSH_AND_CLEAN_REGS instead of opencoded variants thereof. Due to
the interleaving, the additional XOR-based clearing of R8 and R9
in entry_SYSCALL_64_after_hwframe() should not have any noticeable
negative implications.

Suggested-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Dominik Brodowski <linux@dominikbrodowski.net>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Josh Poimboeuf <jpoimboe@redhat.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: dan.j.williams@intel.com
Link: http://lkml.kernel.org/r/20180211104949.12992-6-linux@dominikbrodowski.net
Signed-off-by: Ingo Molnar <mingo@kernel.org>
This commit is contained in:
Dominik Brodowski 2018-02-11 11:49:46 +01:00 committed by Ingo Molnar
parent 3f01daecd5
commit 30907fd13b
2 changed files with 6 additions and 65 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
arch/x86/entry/calling.h
View File

@ -137,7 +137,7 @@ For 32-bit we have the following conventions - kernel is built with
UNWIND_HINT_REGS offset=\offset UNWIND_HINT_REGS offset=\offset
.endm .endm
.macro PUSH_AND_CLEAR_REGS .macro PUSH_AND_CLEAR_REGS rdx=%rdx rax=%rax
/* /*
* Push registers and sanitize registers of values that a * Push registers and sanitize registers of values that a
* speculation attack might otherwise want to exploit. The * speculation attack might otherwise want to exploit. The
@ -147,9 +147,9 @@ For 32-bit we have the following conventions - kernel is built with
*/ */
pushq %rdi /* pt_regs->di */ pushq %rdi /* pt_regs->di */
pushq %rsi /* pt_regs->si */ pushq %rsi /* pt_regs->si */
pushq %rdx /* pt_regs->dx */ pushq \rdx /* pt_regs->dx */
pushq %rcx /* pt_regs->cx */ pushq %rcx /* pt_regs->cx */
pushq %rax /* pt_regs->ax */ pushq \rax /* pt_regs->ax */
pushq %r8 /* pt_regs->r8 */ pushq %r8 /* pt_regs->r8 */
xorq %r8, %r8 /* nospec r8 */ xorq %r8, %r8 /* nospec r8 */
pushq %r9 /* pt_regs->r9 */ pushq %r9 /* pt_regs->r9 */

65
arch/x86/entry/entry_64.S
View File

@ -227,35 +227,8 @@ ENTRY(entry_SYSCALL_64)
pushq %rcx /* pt_regs->ip */ pushq %rcx /* pt_regs->ip */
GLOBAL(entry_SYSCALL_64_after_hwframe) GLOBAL(entry_SYSCALL_64_after_hwframe)
pushq %rax /* pt_regs->orig_ax */ pushq %rax /* pt_regs->orig_ax */
pushq %rdi /* pt_regs->di */
pushq %rsi /* pt_regs->si */ PUSH_AND_CLEAR_REGS rax=$-ENOSYS
pushq %rdx /* pt_regs->dx */
pushq %rcx /* pt_regs->cx */
pushq $-ENOSYS /* pt_regs->ax */
pushq %r8 /* pt_regs->r8 */
pushq %r9 /* pt_regs->r9 */
pushq %r10 /* pt_regs->r10 */
/*
* Clear extra registers that a speculation attack might
* otherwise want to exploit. Interleave XOR with PUSH
* for better uop scheduling:
*/
xorq %r10, %r10 /* nospec r10 */
pushq %r11 /* pt_regs->r11 */
xorq %r11, %r11 /* nospec r11 */
pushq %rbx /* pt_regs->rbx */
xorl %ebx, %ebx /* nospec rbx */
pushq %rbp /* pt_regs->rbp */
xorl %ebp, %ebp /* nospec rbp */
pushq %r12 /* pt_regs->r12 */
xorq %r12, %r12 /* nospec r12 */
pushq %r13 /* pt_regs->r13 */
xorq %r13, %r13 /* nospec r13 */
pushq %r14 /* pt_regs->r14 */
xorq %r14, %r14 /* nospec r14 */
pushq %r15 /* pt_regs->r15 */
xorq %r15, %r15 /* nospec r15 */
UNWIND_HINT_REGS
TRACE_IRQS_OFF TRACE_IRQS_OFF
@ -1388,39 +1361,7 @@ ENTRY(nmi)
pushq 1*8(%rdx) /* pt_regs->rip */ pushq 1*8(%rdx) /* pt_regs->rip */
UNWIND_HINT_IRET_REGS UNWIND_HINT_IRET_REGS
pushq $-1 /* pt_regs->orig_ax */ pushq $-1 /* pt_regs->orig_ax */
pushq %rdi /* pt_regs->di */ PUSH_AND_CLEAR_REGS rdx=(%rdx)
pushq %rsi /* pt_regs->si */
pushq (%rdx) /* pt_regs->dx */
pushq %rcx /* pt_regs->cx */
pushq %rax /* pt_regs->ax */
/*
* Sanitize registers of values that a speculation attack
* might otherwise want to exploit. The lower registers are
* likely clobbered well before they could be put to use in
* a speculative execution gadget. Interleave XOR with PUSH
* for better uop scheduling:
*/
pushq %r8 /* pt_regs->r8 */
xorq %r8, %r8 /* nospec r8 */
pushq %r9 /* pt_regs->r9 */
xorq %r9, %r9 /* nospec r9 */
pushq %r10 /* pt_regs->r10 */
xorq %r10, %r10 /* nospec r10 */
pushq %r11 /* pt_regs->r11 */
xorq %r11, %r11 /* nospec r11*/
pushq %rbx /* pt_regs->rbx */
xorl %ebx, %ebx /* nospec rbx*/
pushq %rbp /* pt_regs->rbp */
xorl %ebp, %ebp /* nospec rbp*/
pushq %r12 /* pt_regs->r12 */
xorq %r12, %r12 /* nospec r12*/
pushq %r13 /* pt_regs->r13 */
xorq %r13, %r13 /* nospec r13*/
pushq %r14 /* pt_regs->r14 */
xorq %r14, %r14 /* nospec r14*/
pushq %r15 /* pt_regs->r15 */
xorq %r15, %r15 /* nospec r15*/
UNWIND_HINT_REGS
ENCODE_FRAME_POINTER ENCODE_FRAME_POINTER
/* /*