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Blackfin arch: dont clear status register bits in SWRST so we can actually use it
Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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@ -468,12 +468,6 @@ ENTRY(_bfin_reset)
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w[p0] = r0.l;
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#endif
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/* Clear the bits 13-15 in SWRST if they werent cleared */
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p0.h = hi(SWRST);
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p0.l = lo(SWRST);
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csync;
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r0.l = w[p0];
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/* Clear the IMASK register */
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p0.h = hi(IMASK);
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p0.l = lo(IMASK);
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@ -504,12 +504,6 @@ _delay_lab1_end:
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nop;
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#endif
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/* Clear the bits 13-15 in SWRST if they werent cleared */
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p0.h = hi(SWRST);
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p0.l = lo(SWRST);
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csync;
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r0.l = w[p0];
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/* Clear the IMASK register */
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p0.h = hi(IMASK);
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p0.l = lo(IMASK);
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@ -414,12 +414,6 @@ ENTRY(_bfin_reset)
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w[p0] = r0.l;
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#endif
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/* Clear the bits 13-15 in SWRST if they werent cleared */
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p0.h = hi(SICA_SWRST);
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p0.l = lo(SICA_SWRST);
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csync;
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r0.l = w[p0];
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/* Clear the IMASK register */
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p0.h = hi(IMASK);
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p0.l = lo(IMASK);
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