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scsi: mpt3sas: Replace readl with ioc->base_readl
Use ioc->base_readl to restrict the readl retries to only Aero controllers. Signed-off-by: Suganath Prabu <suganath-prabu.subramani@broadcom.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
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b899202901
commit
306eaf276b
@ -742,7 +742,7 @@ mpt3sas_halt_firmware(struct MPT3SAS_ADAPTER *ioc)
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dump_stack();
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doorbell = readl(&ioc->chip->Doorbell);
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doorbell = ioc->base_readl(&ioc->chip->Doorbell);
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if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
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mpt3sas_base_fault_info(ioc , doorbell);
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else {
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@ -1351,10 +1351,10 @@ _base_mask_interrupts(struct MPT3SAS_ADAPTER *ioc)
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u32 him_register;
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ioc->mask_interrupts = 1;
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him_register = readl(&ioc->chip->HostInterruptMask);
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him_register = ioc->base_readl(&ioc->chip->HostInterruptMask);
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him_register |= MPI2_HIM_DIM + MPI2_HIM_RIM + MPI2_HIM_RESET_IRQ_MASK;
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writel(him_register, &ioc->chip->HostInterruptMask);
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readl(&ioc->chip->HostInterruptMask);
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ioc->base_readl(&ioc->chip->HostInterruptMask);
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}
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/**
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@ -1368,7 +1368,7 @@ _base_unmask_interrupts(struct MPT3SAS_ADAPTER *ioc)
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{
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u32 him_register;
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him_register = readl(&ioc->chip->HostInterruptMask);
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him_register = ioc->base_readl(&ioc->chip->HostInterruptMask);
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him_register &= ~MPI2_HIM_RIM;
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writel(him_register, &ioc->chip->HostInterruptMask);
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ioc->mask_interrupts = 0;
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@ -4880,7 +4880,7 @@ mpt3sas_base_get_iocstate(struct MPT3SAS_ADAPTER *ioc, int cooked)
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{
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u32 s, sc;
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s = readl(&ioc->chip->Doorbell);
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s = ioc->base_readl(&ioc->chip->Doorbell);
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sc = s & MPI2_IOC_STATE_MASK;
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return cooked ? sc : s;
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}
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@ -4936,7 +4936,7 @@ _base_wait_for_doorbell_int(struct MPT3SAS_ADAPTER *ioc, int timeout)
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count = 0;
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cntdn = 1000 * timeout;
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do {
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int_status = readl(&ioc->chip->HostInterruptStatus);
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int_status = ioc->base_readl(&ioc->chip->HostInterruptStatus);
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if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
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dhsprintk(ioc,
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ioc_info(ioc, "%s: successful count(%d), timeout(%d)\n",
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@ -4962,7 +4962,7 @@ _base_spin_on_doorbell_int(struct MPT3SAS_ADAPTER *ioc, int timeout)
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count = 0;
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cntdn = 2000 * timeout;
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do {
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int_status = readl(&ioc->chip->HostInterruptStatus);
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int_status = ioc->base_readl(&ioc->chip->HostInterruptStatus);
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if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
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dhsprintk(ioc,
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ioc_info(ioc, "%s: successful count(%d), timeout(%d)\n",
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@ -5000,14 +5000,14 @@ _base_wait_for_doorbell_ack(struct MPT3SAS_ADAPTER *ioc, int timeout)
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count = 0;
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cntdn = 1000 * timeout;
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do {
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int_status = readl(&ioc->chip->HostInterruptStatus);
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int_status = ioc->base_readl(&ioc->chip->HostInterruptStatus);
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if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) {
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dhsprintk(ioc,
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ioc_info(ioc, "%s: successful count(%d), timeout(%d)\n",
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__func__, count, timeout));
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return 0;
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} else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
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doorbell = readl(&ioc->chip->Doorbell);
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doorbell = ioc->base_readl(&ioc->chip->Doorbell);
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if ((doorbell & MPI2_IOC_STATE_MASK) ==
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MPI2_IOC_STATE_FAULT) {
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mpt3sas_base_fault_info(ioc , doorbell);
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@ -5042,7 +5042,7 @@ _base_wait_for_doorbell_not_used(struct MPT3SAS_ADAPTER *ioc, int timeout)
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count = 0;
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cntdn = 1000 * timeout;
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do {
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doorbell_reg = readl(&ioc->chip->Doorbell);
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doorbell_reg = ioc->base_readl(&ioc->chip->Doorbell);
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if (!(doorbell_reg & MPI2_DOORBELL_USED)) {
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dhsprintk(ioc,
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ioc_info(ioc, "%s: successful count(%d), timeout(%d)\n",
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@ -5157,13 +5157,13 @@ _base_handshake_req_reply_wait(struct MPT3SAS_ADAPTER *ioc, int request_bytes,
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__le32 *mfp;
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/* make sure doorbell is not in use */
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if ((readl(&ioc->chip->Doorbell) & MPI2_DOORBELL_USED)) {
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if ((ioc->base_readl(&ioc->chip->Doorbell) & MPI2_DOORBELL_USED)) {
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ioc_err(ioc, "doorbell is in use (line=%d)\n", __LINE__);
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return -EFAULT;
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}
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/* clear pending doorbell interrupts from previous state changes */
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if (readl(&ioc->chip->HostInterruptStatus) &
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if (ioc->base_readl(&ioc->chip->HostInterruptStatus) &
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MPI2_HIS_IOC2SYS_DB_STATUS)
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writel(0, &ioc->chip->HostInterruptStatus);
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@ -5206,7 +5206,7 @@ _base_handshake_req_reply_wait(struct MPT3SAS_ADAPTER *ioc, int request_bytes,
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}
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/* read the first two 16-bits, it gives the total length of the reply */
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reply[0] = le16_to_cpu(readl(&ioc->chip->Doorbell)
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reply[0] = le16_to_cpu(ioc->base_readl(&ioc->chip->Doorbell)
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& MPI2_DOORBELL_DATA_MASK);
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writel(0, &ioc->chip->HostInterruptStatus);
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if ((_base_wait_for_doorbell_int(ioc, 5))) {
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@ -5214,7 +5214,7 @@ _base_handshake_req_reply_wait(struct MPT3SAS_ADAPTER *ioc, int request_bytes,
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__LINE__);
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return -EFAULT;
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}
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reply[1] = le16_to_cpu(readl(&ioc->chip->Doorbell)
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reply[1] = le16_to_cpu(ioc->base_readl(&ioc->chip->Doorbell)
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& MPI2_DOORBELL_DATA_MASK);
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writel(0, &ioc->chip->HostInterruptStatus);
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@ -5225,9 +5225,10 @@ _base_handshake_req_reply_wait(struct MPT3SAS_ADAPTER *ioc, int request_bytes,
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return -EFAULT;
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}
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if (i >= reply_bytes/2) /* overflow case */
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readl(&ioc->chip->Doorbell);
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ioc->base_readl(&ioc->chip->Doorbell);
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else
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reply[i] = le16_to_cpu(readl(&ioc->chip->Doorbell)
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reply[i] = le16_to_cpu(
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ioc->base_readl(&ioc->chip->Doorbell)
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& MPI2_DOORBELL_DATA_MASK);
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writel(0, &ioc->chip->HostInterruptStatus);
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}
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@ -6053,14 +6054,14 @@ _base_diag_reset(struct MPT3SAS_ADAPTER *ioc)
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if (count++ > 20)
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goto out;
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host_diagnostic = readl(&ioc->chip->HostDiagnostic);
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host_diagnostic = ioc->base_readl(&ioc->chip->HostDiagnostic);
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drsprintk(ioc,
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ioc_info(ioc, "wrote magic sequence: count(%d), host_diagnostic(0x%08x)\n",
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count, host_diagnostic));
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} while ((host_diagnostic & MPI2_DIAG_DIAG_WRITE_ENABLE) == 0);
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hcb_size = readl(&ioc->chip->HCBSize);
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hcb_size = ioc->base_readl(&ioc->chip->HCBSize);
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drsprintk(ioc, ioc_info(ioc, "diag reset: issued\n"));
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writel(host_diagnostic | MPI2_DIAG_RESET_ADAPTER,
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@ -6073,7 +6074,7 @@ _base_diag_reset(struct MPT3SAS_ADAPTER *ioc)
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for (count = 0; count < (300000000 /
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MPI2_HARD_RESET_PCIE_SECOND_READ_DELAY_MICRO_SEC); count++) {
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host_diagnostic = readl(&ioc->chip->HostDiagnostic);
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host_diagnostic = ioc->base_readl(&ioc->chip->HostDiagnostic);
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if (host_diagnostic == 0xFFFFFFFF)
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goto out;
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