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iommu/tegra: gart: Optimize mapping / unmapping performance
Currently GART writes one page entry at a time. More optimal would be to aggregate the writes and flush BUS buffer in the end, this gives map/unmap 10-40% performance boost (depending on size of mapping) in comparison to flushing after each page entry update. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
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@ -290,7 +290,6 @@ static int gart_iommu_map(struct iommu_domain *domain, unsigned long iova,
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}
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}
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gart_set_pte(gart, iova, GART_PTE(pfn));
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FLUSH_GART_REGS(gart);
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spin_unlock_irqrestore(&gart->pte_lock, flags);
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return 0;
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}
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@ -307,7 +306,6 @@ static size_t gart_iommu_unmap(struct iommu_domain *domain, unsigned long iova,
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spin_lock_irqsave(&gart->pte_lock, flags);
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gart_set_pte(gart, iova, 0);
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FLUSH_GART_REGS(gart);
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spin_unlock_irqrestore(&gart->pte_lock, flags);
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return bytes;
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}
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@ -373,6 +371,14 @@ static int gart_iommu_of_xlate(struct device *dev,
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return 0;
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}
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static void gart_iommu_sync(struct iommu_domain *domain)
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{
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struct gart_domain *gart_domain = to_gart_domain(domain);
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struct gart_device *gart = gart_domain->gart;
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FLUSH_GART_REGS(gart);
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}
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static const struct iommu_ops gart_iommu_ops = {
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.capable = gart_iommu_capable,
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.domain_alloc = gart_iommu_domain_alloc,
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@ -387,6 +393,8 @@ static const struct iommu_ops gart_iommu_ops = {
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.iova_to_phys = gart_iommu_iova_to_phys,
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.pgsize_bitmap = GART_IOMMU_PGSIZES,
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.of_xlate = gart_iommu_of_xlate,
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.iotlb_sync_map = gart_iommu_sync,
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.iotlb_sync = gart_iommu_sync,
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};
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static int tegra_gart_suspend(struct device *dev)
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