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ncr5380: Eliminate PDEBUG*, TDEBUG* and DTCDEBUG* macros
Replace {P,T,DTC}DEBUG_INIT with NDEBUG_INIT. Remove dead debugging code, including code that's conditional upon *DEBUG_TRANSFER. Signed-off-by: Finn Thain <fthain@telegraphics.com.au> Reviewed-by: Hannes Reinecke <hare@suse.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
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@ -205,9 +205,8 @@ static int __init dtc_detect(struct scsi_host_template * tpnt)
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addr = 0;
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} else
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for (; !addr && (current_base < NO_BASES); ++current_base) {
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#if (DTCDEBUG & DTCDEBUG_INIT)
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printk(KERN_DEBUG "scsi-dtc : probing address %08x\n", bases[current_base].address);
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#endif
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dprintk(NDEBUG_INIT, "dtc: probing address 0x%08x\n",
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(unsigned int)bases[current_base].address);
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if (bases[current_base].noauto)
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continue;
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base = ioremap(bases[current_base].address, 0x2000);
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@ -216,18 +215,14 @@ static int __init dtc_detect(struct scsi_host_template * tpnt)
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for (sig = 0; sig < NO_SIGNATURES; ++sig) {
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if (check_signature(base + signatures[sig].offset, signatures[sig].string, strlen(signatures[sig].string))) {
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addr = bases[current_base].address;
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#if (DTCDEBUG & DTCDEBUG_INIT)
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printk(KERN_DEBUG "scsi-dtc : detected board.\n");
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#endif
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dprintk(NDEBUG_INIT, "dtc: detected board\n");
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goto found;
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}
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}
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iounmap(base);
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}
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#if defined(DTCDEBUG) && (DTCDEBUG & DTCDEBUG_INIT)
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printk(KERN_DEBUG "scsi-dtc : base = %08x\n", addr);
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#endif
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dprintk(NDEBUG_INIT, "dtc: addr = 0x%08x\n", addr);
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if (!addr)
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break;
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@ -271,9 +266,8 @@ found:
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printk(KERN_WARNING "scsi%d : interrupts not used. Might as well not jumper it.\n", instance->host_no);
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instance->irq = NO_IRQ;
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#endif
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#if defined(DTCDEBUG) && (DTCDEBUG & DTCDEBUG_INIT)
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printk("scsi%d : irq = %d\n", instance->host_no, instance->irq);
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#endif
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dprintk(NDEBUG_INIT, "scsi%d : irq = %d\n",
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instance->host_no, instance->irq);
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++current_override;
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++count;
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@ -10,10 +10,6 @@
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#ifndef DTC3280_H
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#define DTC3280_H
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#define DTCDEBUG 0
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#define DTCDEBUG_INIT 0x1
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#define DTCDEBUG_TRANSFER 0x2
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#ifndef CMD_PER_LUN
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#define CMD_PER_LUN 2
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#endif
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@ -33,31 +29,8 @@
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#define DTC_address(reg) (base + DTC_5380_OFFSET + reg)
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#define dbNCR5380_read(reg) \
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(rval=readb(DTC_address(reg)), \
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(((unsigned char) printk("DTC : read register %d at addr %p is: %02x\n"\
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, (reg), DTC_address(reg), rval)), rval ) )
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#define dbNCR5380_write(reg, value) do { \
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printk("DTC : write %02x to register %d at address %p\n", \
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(value), (reg), DTC_address(reg)); \
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writeb(value, DTC_address(reg));} while(0)
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#if !(DTCDEBUG & DTCDEBUG_TRANSFER)
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#define NCR5380_read(reg) (readb(DTC_address(reg)))
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#define NCR5380_write(reg, value) (writeb(value, DTC_address(reg)))
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#else
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#define NCR5380_read(reg) (readb(DTC_address(reg)))
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#define xNCR5380_read(reg) \
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(((unsigned char) printk("DTC : read register %d at address %p\n"\
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, (reg), DTC_address(reg))), readb(DTC_address(reg)))
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#define NCR5380_write(reg, value) do { \
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printk("DTC : write %02x to register %d at address %p\n", \
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(value), (reg), DTC_address(reg)); \
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writeb(value, DTC_address(reg));} while(0)
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#endif
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#define NCR5380_intr dtc_intr
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#define NCR5380_queue_command dtc_queue_command
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@ -1,6 +1,5 @@
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#define PSEUDO_DMA
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#define UNSAFE /* Not unsafe for PAS16 -- use it */
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#define PDEBUG 0
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/*
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* This driver adapted from Drew Eckhardt's Trantor T128 driver
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@ -377,23 +376,18 @@ static int __init pas16_detect(struct scsi_host_template *tpnt)
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}
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else
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for (; !io_port && (current_base < NO_BASES); ++current_base) {
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#if (PDEBUG & PDEBUG_INIT)
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printk("scsi-pas16 : probing io_port %04x\n", (unsigned int) bases[current_base].io_port);
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#endif
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dprintk(NDEBUG_INIT, "pas16: probing io_port 0x%04x\n",
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(unsigned int)bases[current_base].io_port);
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if ( !bases[current_base].noauto &&
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pas16_hw_detect( current_base ) ){
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io_port = bases[current_base].io_port;
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init_board( io_port, default_irqs[ current_base ], 0 );
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#if (PDEBUG & PDEBUG_INIT)
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printk("scsi-pas16 : detected board.\n");
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#endif
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dprintk(NDEBUG_INIT, "pas16: detected board\n");
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}
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}
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#if defined(PDEBUG) && (PDEBUG & PDEBUG_INIT)
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printk("scsi-pas16 : io_port = %04x\n", (unsigned int) io_port);
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#endif
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dprintk(NDEBUG_INIT, "pas16: io_port = 0x%04x\n",
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(unsigned int)io_port);
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if (!io_port)
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break;
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@ -431,9 +425,8 @@ static int __init pas16_detect(struct scsi_host_template *tpnt)
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outb( (inb(io_port + IO_CONFIG_3) & 0x0f), io_port + IO_CONFIG_3 );
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}
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#if defined(PDEBUG) && (PDEBUG & PDEBUG_INIT)
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printk("scsi%d : irq = %d\n", instance->host_no, instance->irq);
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#endif
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dprintk(NDEBUG_INIT, "scsi%d : irq = %d\n",
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instance->host_no, instance->irq);
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++current_override;
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++count;
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@ -24,9 +24,6 @@
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#ifndef PAS16_H
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#define PAS16_H
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#define PDEBUG_INIT 0x1
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#define PDEBUG_TRANSFER 0x2
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#define PAS16_DEFAULT_BASE_1 0x388
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#define PAS16_DEFAULT_BASE_2 0x384
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#define PAS16_DEFAULT_BASE_3 0x38c
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@ -120,21 +117,8 @@
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#define PAS16_io_port(reg) ( io_port + pas16_offset[(reg)] )
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#if !(PDEBUG & PDEBUG_TRANSFER)
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#define NCR5380_read(reg) ( inb(PAS16_io_port(reg)) )
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#define NCR5380_write(reg, value) ( outb((value),PAS16_io_port(reg)) )
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#else
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#define NCR5380_read(reg) \
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(((unsigned char) printk("scsi%d : read register %d at io_port %04x\n"\
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, instance->hostno, (reg), PAS16_io_port(reg))), inb( PAS16_io_port(reg)) )
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#define NCR5380_write(reg, value) \
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(printk("scsi%d : write %02x to register %d at io_port %04x\n", \
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instance->hostno, (value), (reg), PAS16_io_port(reg)), \
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outb( (value),PAS16_io_port(reg) ) )
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#endif
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#define NCR5380_intr pas16_intr
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#define do_NCR5380_intr do_pas16_intr
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@ -182,9 +182,8 @@ static int __init t128_detect(struct scsi_host_template *tpnt)
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base = 0;
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} else
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for (; !base && (current_base < NO_BASES); ++current_base) {
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#if (TDEBUG & TDEBUG_INIT)
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printk("scsi-t128 : probing address %08x\n", bases[current_base].address);
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#endif
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dprintk(NDEBUG_INIT, "t128: probing address 0x%08x\n",
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bases[current_base].address);
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if (bases[current_base].noauto)
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continue;
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p = ioremap(bases[current_base].address, 0x2000);
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@ -195,17 +194,13 @@ static int __init t128_detect(struct scsi_host_template *tpnt)
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signatures[sig].string,
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strlen(signatures[sig].string))) {
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base = bases[current_base].address;
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#if (TDEBUG & TDEBUG_INIT)
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printk("scsi-t128 : detected board.\n");
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#endif
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dprintk(NDEBUG_INIT, "t128: detected board\n");
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goto found;
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}
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iounmap(p);
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}
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#if defined(TDEBUG) && (TDEBUG & TDEBUG_INIT)
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printk("scsi-t128 : base = %08x\n", (unsigned int) base);
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#endif
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dprintk(NDEBUG_INIT, "t128: base = 0x%08x\n", (unsigned int)base);
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if (!base)
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break;
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@ -242,9 +237,8 @@ found:
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printk("scsi%d : please jumper the board for a free IRQ.\n", instance->host_no);
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}
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#if defined(TDEBUG) && (TDEBUG & TDEBUG_INIT)
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printk("scsi%d : irq = %d\n", instance->host_no, instance->irq);
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#endif
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dprintk(NDEBUG_INIT, "scsi%d: irq = %d\n",
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instance->host_no, instance->irq);
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++current_override;
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++count;
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@ -23,10 +23,6 @@
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#ifndef T128_H
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#define T128_H
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#define TDEBUG 0
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#define TDEBUG_INIT 0x1
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#define TDEBUG_TRANSFER 0x2
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/*
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* The trantor boards are memory mapped. They use an NCR5380 or
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* equivalent (my sample board had part second sourced from ZILOG).
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@ -92,20 +88,8 @@
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#define T128_address(reg) (base + T_5380_OFFSET + ((reg) * 0x20))
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#if !(TDEBUG & TDEBUG_TRANSFER)
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#define NCR5380_read(reg) readb(T128_address(reg))
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#define NCR5380_write(reg, value) writeb((value),(T128_address(reg)))
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#else
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#define NCR5380_read(reg) \
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(((unsigned char) printk("scsi%d : read register %d at address %08x\n"\
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, instance->hostno, (reg), T128_address(reg))), readb(T128_address(reg)))
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#define NCR5380_write(reg, value) { \
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printk("scsi%d : write %02x to register %d at address %08x\n", \
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instance->hostno, (value), (reg), T128_address(reg)); \
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writeb((value), (T128_address(reg))); \
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}
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#endif
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#define NCR5380_intr t128_intr
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#define do_NCR5380_intr do_t128_intr
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