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OMAP3: PM: CORE domain off-mode support
Add context save and restore for CORE powerdomain resources in order to support off-mode. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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@ -5,6 +5,9 @@
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* Tony Lindgren <tony@atomide.com>
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* Jouni Hogander
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*
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* Copyright (C) 2007 Texas Instruments, Inc.
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* Rajendra Nayak <rnayak@ti.com>
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*
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* Copyright (C) 2005 Texas Instruments, Inc.
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* Richard Woodruff <r-woodruff2@ti.com>
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*
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@ -29,6 +32,8 @@
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#include <plat/control.h>
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#include <plat/serial.h>
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#include <plat/sdrc.h>
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#include <plat/prcm.h>
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#include <plat/gpmc.h>
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#include <asm/tlbflush.h>
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@ -39,6 +44,11 @@
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#include "prm.h"
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#include "pm.h"
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/* Scratchpad offsets */
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#define OMAP343X_TABLE_ADDRESS_OFFSET 0x31
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#define OMAP343X_TABLE_VALUE_OFFSET 0x30
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#define OMAP343X_CONTROL_REG_VALUE_OFFSET 0x32
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struct power_state {
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struct powerdomain *pwrdm;
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u32 next_state;
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@ -57,6 +67,46 @@ static struct powerdomain *core_pwrdm, *per_pwrdm;
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static int set_pwrdm_state(struct powerdomain *pwrdm, u32 state);
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static inline void omap3_per_save_context(void)
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{
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omap_gpio_save_context();
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}
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static inline void omap3_per_restore_context(void)
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{
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omap_gpio_restore_context();
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}
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static void omap3_core_save_context(void)
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{
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u32 control_padconf_off;
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/* Save the padconf registers */
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control_padconf_off = omap_ctrl_readl(OMAP343X_CONTROL_PADCONF_OFF);
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control_padconf_off |= START_PADCONF_SAVE;
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omap_ctrl_writel(control_padconf_off, OMAP343X_CONTROL_PADCONF_OFF);
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/* wait for the save to complete */
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while (!omap_ctrl_readl(OMAP343X_CONTROL_GENERAL_PURPOSE_STATUS)
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& PADCONF_SAVE_DONE)
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;
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/* Save the Interrupt controller context */
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omap_intc_save_context();
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/* Save the GPMC context */
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omap3_gpmc_save_context();
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/* Save the system control module context, padconf already save above*/
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omap3_control_save_context();
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}
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static void omap3_core_restore_context(void)
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{
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/* Restore the control module context, padconf restored by h/w */
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omap3_control_restore_context();
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/* Restore the GPMC context */
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omap3_gpmc_restore_context();
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/* Restore the interrupt controller context */
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omap_intc_restore_context();
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}
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/*
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* PRCM Interrupt Handler Helper Function
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*
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@ -208,6 +258,7 @@ static void omap_sram_idle(void)
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int mpu_next_state = PWRDM_POWER_ON;
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int per_next_state = PWRDM_POWER_ON;
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int core_next_state = PWRDM_POWER_ON;
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int core_prev_state, per_prev_state;
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if (!_omap_sram_idle)
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return;
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@ -246,8 +297,15 @@ static void omap_sram_idle(void)
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omap_uart_prepare_idle(1);
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/* PER changes only with core */
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per_next_state = pwrdm_read_next_pwrst(per_pwrdm);
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if (per_next_state < PWRDM_POWER_ON)
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if (per_next_state < PWRDM_POWER_ON) {
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omap_uart_prepare_idle(2);
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if (per_next_state == PWRDM_POWER_OFF)
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omap3_per_save_context();
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}
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if (core_next_state == PWRDM_POWER_OFF) {
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omap3_core_save_context();
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omap3_prcm_save_context();
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}
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/* Enable IO-PAD wakeup */
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prm_set_mod_reg_bits(OMAP3430_EN_IO, WKUP_MOD, PM_WKEN);
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}
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@ -272,6 +330,18 @@ static void omap_sram_idle(void)
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/* Disable IO-PAD wakeup */
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prm_clear_mod_reg_bits(OMAP3430_EN_IO, WKUP_MOD, PM_WKEN);
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core_prev_state = pwrdm_read_prev_pwrst(core_pwrdm);
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if (core_prev_state == PWRDM_POWER_OFF) {
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omap3_core_restore_context();
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omap3_prcm_restore_context();
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omap3_sram_restore_context();
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}
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if (per_next_state < PWRDM_POWER_ON) {
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per_prev_state =
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pwrdm_read_prev_pwrst(per_pwrdm);
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if (per_prev_state == PWRDM_POWER_OFF)
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omap3_per_restore_context();
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}
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omap2_gpio_resume_after_retention();
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}
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@ -843,6 +913,7 @@ static int __init omap3_pm_init(void)
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/* XXX prcm_setup_regs needs to be before enabling hw
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* supervised mode for powerdomains */
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prcm_setup_regs();
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omap3_save_scratchpad_contents();
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ret = request_irq(INT_34XX_PRCM_MPU_IRQ,
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(irq_handler_t)prcm_interrupt_handler,
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@ -27,6 +27,7 @@ extern u32 omap3_configure_core_dpll(
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u32 sdrc_actim_ctrl_b_0, u32 sdrc_mr_0,
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u32 sdrc_rfr_ctrl_1, u32 sdrc_actim_ctrl_a_1,
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u32 sdrc_actim_ctrl_b_1, u32 sdrc_mr_1);
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extern void omap3_sram_restore_context(void);
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/* Do not use these */
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extern void omap1_sram_reprogram_clock(u32 ckctl, u32 dpllctl);
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