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powerpc/85xx: Add support for MPC8536DS
Add support for the MPC8536 process and MPC8536DS reference board. The MPC8536 is an e500v2 based SoC which eTSEC, USB, SATA, PCI, and PCIe. The USB and SATA IP blocks are similiar to those on the PQ2 Pro SoCs and thus use the same drivers. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This commit is contained in:
Kumar Gala
parent
a712b65cd0
commit
2f3804edf9
420
arch/powerpc/boot/dts/mpc8536ds.dts
Normal file
420
arch/powerpc/boot/dts/mpc8536ds.dts
Normal file
@ -0,0 +1,420 @@
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/*
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* MPC8536 DS Device Tree Source
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*
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* Copyright 2008 Freescale Semiconductor, Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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/dts-v1/;
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/ {
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model = "fsl,mpc8536ds";
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compatible = "fsl,mpc8536ds";
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#address-cells = <1>;
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#size-cells = <1>;
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aliases {
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ethernet0 = &enet0;
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ethernet1 = &enet1;
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serial0 = &serial0;
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serial1 = &serial1;
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pci0 = &pci0;
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pci1 = &pci1;
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pci2 = &pci2;
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pci3 = &pci3;
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};
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cpus {
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#cpus = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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PowerPC,8536@0 {
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device_type = "cpu";
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reg = <0>;
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next-level-cache = <&L2>;
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};
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};
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memory {
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device_type = "memory";
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reg = <00000000 00000000>; // Filled by U-Boot
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};
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soc@ffe00000 {
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#address-cells = <1>;
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#size-cells = <1>;
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device_type = "soc";
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ranges = <0x0 0xffe00000 0x100000>;
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reg = <0xffe00000 0x1000>;
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bus-frequency = <0>; // Filled out by uboot.
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memory-controller@2000 {
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compatible = "fsl,mpc8536-memory-controller";
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reg = <0x2000 0x1000>;
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interrupt-parent = <&mpic>;
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interrupts = <18 0x2>;
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};
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L2: l2-cache-controller@20000 {
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compatible = "fsl,mpc8536-l2-cache-controller";
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reg = <0x20000 0x1000>;
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interrupt-parent = <&mpic>;
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interrupts = <16 0x2>;
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};
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i2c@3000 {
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#address-cells = <1>;
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#size-cells = <0>;
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cell-index = <0>;
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compatible = "fsl-i2c";
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reg = <0x3000 0x100>;
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interrupts = <43 0x2>;
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interrupt-parent = <&mpic>;
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dfsrr;
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};
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i2c@3100 {
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#address-cells = <1>;
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#size-cells = <0>;
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cell-index = <1>;
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compatible = "fsl-i2c";
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reg = <0x3100 0x100>;
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interrupts = <43 0x2>;
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interrupt-parent = <&mpic>;
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dfsrr;
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rtc@68 {
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compatible = "dallas,ds3232";
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reg = <0x68>;
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};
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};
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dma@21300 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "fsl,mpc8536-dma", "fsl,eloplus-dma";
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reg = <0x21300 4>;
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ranges = <0 0x21100 0x200>;
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cell-index = <0>;
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dma-channel@0 {
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compatible = "fsl,mpc8536-dma-channel",
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"fsl,eloplus-dma-channel";
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reg = <0x0 0x80>;
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cell-index = <0>;
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interrupt-parent = <&mpic>;
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interrupts = <14 0x2>;
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};
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dma-channel@80 {
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compatible = "fsl,mpc8536-dma-channel",
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"fsl,eloplus-dma-channel";
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reg = <0x80 0x80>;
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cell-index = <1>;
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interrupt-parent = <&mpic>;
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interrupts = <15 0x2>;
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};
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dma-channel@100 {
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compatible = "fsl,mpc8536-dma-channel",
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"fsl,eloplus-dma-channel";
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reg = <0x100 0x80>;
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cell-index = <2>;
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interrupt-parent = <&mpic>;
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interrupts = <16 0x2>;
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};
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dma-channel@180 {
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compatible = "fsl,mpc8536-dma-channel",
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"fsl,eloplus-dma-channel";
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reg = <0x180 0x80>;
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cell-index = <3>;
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interrupt-parent = <&mpic>;
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interrupts = <17 0x2>;
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};
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};
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mdio@24520 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,gianfar-mdio";
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reg = <0x24520 0x20>;
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phy0: ethernet-phy@0 {
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interrupt-parent = <&mpic>;
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interrupts = <10 0x1>;
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reg = <0>;
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device_type = "ethernet-phy";
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};
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phy1: ethernet-phy@1 {
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interrupt-parent = <&mpic>;
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interrupts = <10 0x1>;
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reg = <1>;
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device_type = "ethernet-phy";
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};
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};
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usb@22000 {
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compatible = "fsl,mpc8536-usb2-mph", "fsl-usb2-mph";
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reg = <0x22000 0x1000>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupt-parent = <&mpic>;
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interrupts = <28 0x2>;
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phy_type = "ulpi";
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};
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usb@23000 {
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compatible = "fsl,mpc8536-usb2-mph", "fsl-usb2-mph";
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reg = <0x23000 0x1000>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupt-parent = <&mpic>;
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interrupts = <46 0x2>;
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phy_type = "ulpi";
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};
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enet0: ethernet@24000 {
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cell-index = <0>;
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device_type = "network";
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model = "TSEC";
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compatible = "gianfar";
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reg = <0x24000 0x1000>;
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local-mac-address = [ 00 00 00 00 00 00 ];
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interrupts = <29 2 30 2 34 2>;
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interrupt-parent = <&mpic>;
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phy-handle = <&phy1>;
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phy-connection-type = "rgmii-id";
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};
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enet1: ethernet@26000 {
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cell-index = <1>;
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device_type = "network";
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model = "TSEC";
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compatible = "gianfar";
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reg = <0x26000 0x1000>;
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local-mac-address = [ 00 00 00 00 00 00 ];
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interrupts = <31 2 32 2 33 2>;
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interrupt-parent = <&mpic>;
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phy-handle = <&phy0>;
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phy-connection-type = "rgmii-id";
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};
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usb@2b000 {
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compatible = "fsl,mpc8536-usb2-dr", "fsl-usb2-dr";
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reg = <0x2b000 0x1000>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupt-parent = <&mpic>;
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interrupts = <60 0x2>;
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dr_mode = "peripheral";
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phy_type = "ulpi";
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};
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serial0: serial@4500 {
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cell-index = <0>;
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device_type = "serial";
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compatible = "ns16550";
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reg = <0x4500 0x100>;
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clock-frequency = <0>;
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interrupts = <42 0x2>;
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interrupt-parent = <&mpic>;
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};
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serial1: serial@4600 {
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cell-index = <1>;
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device_type = "serial";
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compatible = "ns16550";
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reg = <0x4600 0x100>;
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clock-frequency = <0>;
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interrupts = <42 0x2>;
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interrupt-parent = <&mpic>;
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};
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sata@18000 {
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compatible = "fsl,mpc8536-sata", "fsl,pq-sata";
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reg = <0x18000 0x1000>;
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cell-index = <1>;
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interrupts = <74 0x2>;
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interrupt-parent = <&mpic>;
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};
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sata@19000 {
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compatible = "fsl,mpc8536-sata", "fsl,pq-sata";
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reg = <0x19000 0x1000>;
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cell-index = <2>;
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interrupts = <41 0x2>;
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interrupt-parent = <&mpic>;
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};
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global-utilities@e0000 { //global utilities block
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compatible = "fsl,mpc8548-guts";
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reg = <0xe0000 0x1000>;
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fsl,has-rstcr;
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};
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mpic: pic@40000 {
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clock-frequency = <0>;
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interrupt-controller;
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#address-cells = <0>;
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#interrupt-cells = <2>;
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reg = <0x40000 0x40000>;
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compatible = "chrp,open-pic";
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device_type = "open-pic";
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big-endian;
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};
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msi@41600 {
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compatible = "fsl,mpc8536-msi", "fsl,mpic-msi";
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reg = <0x41600 0x80>;
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msi-available-ranges = <0 0x100>;
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interrupts = <
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0xe0 0
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0xe1 0
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0xe2 0
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0xe3 0
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0xe4 0
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0xe5 0
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0xe6 0
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0xe7 0>;
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interrupt-parent = <&mpic>;
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};
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};
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pci0: pci@ffe08000 {
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cell-index = <0>;
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compatible = "fsl,mpc8540-pci";
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device_type = "pci";
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interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
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interrupt-map = <
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/* IDSEL 0x11 J17 Slot 1 */
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0x8800 0 0 1 &mpic 1 1
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0x8800 0 0 2 &mpic 2 1
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0x8800 0 0 3 &mpic 3 1
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0x8800 0 0 4 &mpic 4 1>;
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interrupt-parent = <&mpic>;
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interrupts = <24 0x2>;
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bus-range = <0 0xff>;
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ranges = <0x02000000 0 0x80000000 0x80000000 0 0x10000000
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0x01000000 0 0x00000000 0xffc00000 0 0x00010000>;
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clock-frequency = <66666666>;
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#interrupt-cells = <1>;
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#size-cells = <2>;
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#address-cells = <3>;
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reg = <0xffe08000 0x1000>;
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};
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pci1: pcie@ffe09000 {
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cell-index = <1>;
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compatible = "fsl,mpc8548-pcie";
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device_type = "pci";
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#interrupt-cells = <1>;
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#size-cells = <2>;
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#address-cells = <3>;
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reg = <0xffe09000 0x1000>;
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bus-range = <0 0xff>;
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ranges = <0x02000000 0 0x98000000 0x98000000 0 0x08000000
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0x01000000 0 0x00000000 0xffc20000 0 0x00010000>;
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clock-frequency = <33333333>;
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interrupt-parent = <&mpic>;
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interrupts = <25 0x2>;
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interrupt-map-mask = <0xf800 0 0 7>;
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interrupt-map = <
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/* IDSEL 0x0 */
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0000 0 0 1 &mpic 4 1
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0000 0 0 2 &mpic 5 1
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0000 0 0 3 &mpic 6 1
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0000 0 0 4 &mpic 7 1
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>;
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pcie@0 {
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reg = <0 0 0 0 0>;
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#size-cells = <2>;
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#address-cells = <3>;
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device_type = "pci";
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ranges = <0x02000000 0 0x98000000
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0x02000000 0 0x98000000
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0 0x08000000
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0x01000000 0 0x00000000
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0x01000000 0 0x00000000
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0 0x00010000>;
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};
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};
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pci2: pcie@ffe0a000 {
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cell-index = <2>;
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compatible = "fsl,mpc8548-pcie";
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device_type = "pci";
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#interrupt-cells = <1>;
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#size-cells = <2>;
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#address-cells = <3>;
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reg = <0xffe0a000 0x1000>;
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bus-range = <0 0xff>;
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ranges = <0x02000000 0 0x90000000 0x90000000 0 0x08000000
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0x01000000 0 0x00000000 0xffc10000 0 0x00010000>;
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clock-frequency = <33333333>;
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interrupt-parent = <&mpic>;
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interrupts = <26 0x2>;
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interrupt-map-mask = <0xf800 0 0 7>;
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interrupt-map = <
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/* IDSEL 0x0 */
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0000 0 0 1 &mpic 0 1
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0000 0 0 2 &mpic 1 1
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0000 0 0 3 &mpic 2 1
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0000 0 0 4 &mpic 3 1
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>;
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pcie@0 {
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reg = <0 0 0 0 0>;
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#size-cells = <2>;
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#address-cells = <3>;
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device_type = "pci";
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ranges = <0x02000000 0 0x90000000
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0x02000000 0 0x90000000
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0 0x08000000
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0x01000000 0 0x00000000
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0x01000000 0 0x00000000
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0 0x00010000>;
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};
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};
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pci3: pcie@ffe0b000 {
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cell-index = <3>;
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compatible = "fsl,mpc8548-pcie";
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device_type = "pci";
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#interrupt-cells = <1>;
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#size-cells = <2>;
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#address-cells = <3>;
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reg = <0xffe0b000 0x1000>;
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bus-range = <0 0xff>;
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ranges = <0x02000000 0 0xa0000000 0xa0000000 0 0x20000000
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0x01000000 0 0x00000000 0xffc30000 0 0x00010000>;
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clock-frequency = <33333333>;
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interrupt-parent = <&mpic>;
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interrupts = <27 0x2>;
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interrupt-map-mask = <0xf800 0 0 7>;
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interrupt-map = <
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/* IDSEL 0x0 */
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0000 0 0 1 &mpic 8 1
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0000 0 0 2 &mpic 9 1
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0000 0 0 3 &mpic 10 1
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0000 0 0 4 &mpic 11 1
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>;
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pcie@0 {
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reg = <0 0 0 0 0>;
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#size-cells = <2>;
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#address-cells = <3>;
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device_type = "pci";
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ranges = <0x02000000 0 0xa0000000
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0x02000000 0 0xa0000000
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0 0x20000000
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0x01000000 0 0x00000000
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0x01000000 0 0x00000000
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0 0x00100000>;
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};
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};
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};
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1637
arch/powerpc/configs/mpc8536_ds_defconfig
Normal file
1637
arch/powerpc/configs/mpc8536_ds_defconfig
Normal file
File diff suppressed because it is too large
Load Diff
@ -38,6 +38,12 @@ config MPC85xx_MDS
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help
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This option enables support for the MPC85xx MDS board
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config MPC8536_DS
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bool "Freescale MPC8536 DS"
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select DEFAULT_UIMAGE
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help
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This option enables support for the MPC8536 DS board
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config MPC85xx_DS
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bool "Freescale MPC85xx DS"
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select PPC_I8259
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@ -4,6 +4,7 @@
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obj-$(CONFIG_MPC8540_ADS) += mpc85xx_ads.o
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obj-$(CONFIG_MPC8560_ADS) += mpc85xx_ads.o
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obj-$(CONFIG_MPC85xx_CDS) += mpc85xx_cds.o
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obj-$(CONFIG_MPC8536_DS) += mpc8536_ds.o
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obj-$(CONFIG_MPC85xx_DS) += mpc85xx_ds.o
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obj-$(CONFIG_MPC85xx_MDS) += mpc85xx_mds.o
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obj-$(CONFIG_STX_GP3) += stx_gp3.o
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125
arch/powerpc/platforms/85xx/mpc8536_ds.c
Normal file
125
arch/powerpc/platforms/85xx/mpc8536_ds.c
Normal file
@ -0,0 +1,125 @@
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/*
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* MPC8536 DS Board Setup
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*
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* Copyright 2008 Freescale Semiconductor, Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
|
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* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
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* option) any later version.
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*/
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#include <linux/stddef.h>
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#include <linux/kernel.h>
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#include <linux/pci.h>
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#include <linux/kdev_t.h>
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#include <linux/delay.h>
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#include <linux/seq_file.h>
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#include <linux/interrupt.h>
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#include <linux/of_platform.h>
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#include <asm/system.h>
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#include <asm/time.h>
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#include <asm/machdep.h>
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#include <asm/pci-bridge.h>
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#include <mm/mmu_decl.h>
|
||||
#include <asm/prom.h>
|
||||
#include <asm/udbg.h>
|
||||
#include <asm/mpic.h>
|
||||
|
||||
#include <sysdev/fsl_soc.h>
|
||||
#include <sysdev/fsl_pci.h>
|
||||
|
||||
void __init mpc8536_ds_pic_init(void)
|
||||
{
|
||||
struct mpic *mpic;
|
||||
struct resource r;
|
||||
struct device_node *np;
|
||||
|
||||
np = of_find_node_by_type(np, "open-pic");
|
||||
if (np == NULL) {
|
||||
printk(KERN_ERR "Could not find open-pic node\n");
|
||||
return;
|
||||
}
|
||||
|
||||
if (of_address_to_resource(np, 0, &r)) {
|
||||
printk(KERN_ERR "Failed to map mpic register space\n");
|
||||
of_node_put(np);
|
||||
return;
|
||||
}
|
||||
|
||||
mpic = mpic_alloc(np, r.start,
|
||||
MPIC_PRIMARY | MPIC_WANTS_RESET |
|
||||
MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS,
|
||||
0, 256, " OpenPIC ");
|
||||
BUG_ON(mpic == NULL);
|
||||
of_node_put(np);
|
||||
|
||||
mpic_init(mpic);
|
||||
}
|
||||
|
||||
/*
|
||||
* Setup the architecture
|
||||
*/
|
||||
static void __init mpc8536_ds_setup_arch(void)
|
||||
{
|
||||
#ifdef CONFIG_PCI
|
||||
struct device_node *np;
|
||||
#endif
|
||||
|
||||
if (ppc_md.progress)
|
||||
ppc_md.progress("mpc8536_ds_setup_arch()", 0);
|
||||
|
||||
#ifdef CONFIG_PCI
|
||||
for_each_node_by_type(np, "pci") {
|
||||
if (of_device_is_compatible(np, "fsl,mpc8540-pci") ||
|
||||
of_device_is_compatible(np, "fsl,mpc8548-pcie")) {
|
||||
struct resource rsrc;
|
||||
of_address_to_resource(np, 0, &rsrc);
|
||||
if ((rsrc.start & 0xfffff) == 0x8000)
|
||||
fsl_add_bridge(np, 1);
|
||||
else
|
||||
fsl_add_bridge(np, 0);
|
||||
}
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
printk("MPC8536 DS board from Freescale Semiconductor\n");
|
||||
}
|
||||
|
||||
static struct of_device_id __initdata mpc8536_ds_ids[] = {
|
||||
{ .type = "soc", },
|
||||
{ .compatible = "soc", },
|
||||
{},
|
||||
};
|
||||
|
||||
static int __init mpc8536_ds_publish_devices(void)
|
||||
{
|
||||
return of_platform_bus_probe(NULL, mpc8536_ds_ids, NULL);
|
||||
}
|
||||
machine_device_initcall(mpc8536_ds, mpc8536_ds_publish_devices);
|
||||
|
||||
/*
|
||||
* Called very early, device-tree isn't unflattened
|
||||
*/
|
||||
static int __init mpc8536_ds_probe(void)
|
||||
{
|
||||
unsigned long root = of_get_flat_dt_root();
|
||||
|
||||
return of_flat_dt_is_compatible(root, "fsl,mpc8536ds");
|
||||
}
|
||||
|
||||
define_machine(mpc8536_ds) {
|
||||
.name = "MPC8536 DS",
|
||||
.probe = mpc8536_ds_probe,
|
||||
.setup_arch = mpc8536_ds_setup_arch,
|
||||
.init_IRQ = mpc8536_ds_pic_init,
|
||||
#ifdef CONFIG_PCI
|
||||
.pcibios_fixup_bus = fsl_pcibios_fixup_bus,
|
||||
#endif
|
||||
.get_irq = mpic_get_irq,
|
||||
.restart = fsl_rstcr_restart,
|
||||
.calibrate_decr = generic_calibrate_decr,
|
||||
.progress = udbg_progress,
|
||||
};
|
||||
@ -243,6 +243,8 @@ DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8544E, quirk_fsl_pcie_header);
|
||||
DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8544, quirk_fsl_pcie_header);
|
||||
DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8572E, quirk_fsl_pcie_header);
|
||||
DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8572, quirk_fsl_pcie_header);
|
||||
DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8536E, quirk_fsl_pcie_header);
|
||||
DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8536, quirk_fsl_pcie_header);
|
||||
DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8641, quirk_fsl_pcie_header);
|
||||
DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8641D, quirk_fsl_pcie_header);
|
||||
DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8610, quirk_fsl_pcie_header);
|
||||
|
||||
@ -2171,6 +2171,8 @@
|
||||
#define PCI_DEVICE_ID_MPC8544 0x0033
|
||||
#define PCI_DEVICE_ID_MPC8572E 0x0040
|
||||
#define PCI_DEVICE_ID_MPC8572 0x0041
|
||||
#define PCI_DEVICE_ID_MPC8536E 0x0050
|
||||
#define PCI_DEVICE_ID_MPC8536 0x0051
|
||||
#define PCI_DEVICE_ID_MPC8641 0x7010
|
||||
#define PCI_DEVICE_ID_MPC8641D 0x7011
|
||||
#define PCI_DEVICE_ID_MPC8610 0x7018
|
||||
|
||||
Loading…
Reference in New Issue
Block a user