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drm/xe/uc: Use managed bo for HuC and GSC objects

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Drmm actions are not the right ones to clean up BOs and we should use
devm instead. However, we can also instead just allocate the objects
using the managed_bo function, which will internally register the
correct cleanup call and therefore allows us to simplify the code.

While at it, switch to drmm_kzalloc for the GSC proxy allocation to
further simplify the cleanup.

Cc: John Harrison <John.C.Harrison@Intel.com>
Cc: Alan Previn <alan.previn.teres.alexis@intel.com>
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240815230541.3828206-1-lucas.demarchi@intel.com
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
This commit is contained in:
Daniele Ceraolo Spurio 2024-08-15 16:05:39 -07:00 committed by Lucas De Marchi
parent 3396900aa2
commit 2e5d47fe78
3 changed files with 14 additions and 53 deletions
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12
drivers/gpu/drm/xe/xe_gsc.c
View File

@ -450,11 +450,6 @@ static void free_resources(struct drm_device *drm, void *arg)
xe_exec_queue_put(gsc->q); xe_exec_queue_put(gsc->q);
gsc->q = NULL; gsc->q = NULL;
} }
if (gsc->private) {
xe_bo_unpin_map_no_vm(gsc->private);
gsc->private = NULL;
}
} }
int xe_gsc_init_post_hwconfig(struct xe_gsc *gsc) int xe_gsc_init_post_hwconfig(struct xe_gsc *gsc)
@ -474,10 +469,9 @@ int xe_gsc_init_post_hwconfig(struct xe_gsc *gsc)
if (!hwe) if (!hwe)
return -ENODEV; return -ENODEV;
bo = xe_bo_create_pin_map(xe, tile, NULL, SZ_4M, bo = xe_managed_bo_create_pin_map(xe, tile, SZ_4M,
ttm_bo_type_kernel, XE_BO_FLAG_STOLEN |
XE_BO_FLAG_STOLEN | XE_BO_FLAG_GGTT);
XE_BO_FLAG_GGTT);
if (IS_ERR(bo)) if (IS_ERR(bo))
return PTR_ERR(bo); return PTR_ERR(bo);

36
drivers/gpu/drm/xe/xe_gsc_proxy.c
View File

@ -371,27 +371,6 @@ static const struct component_ops xe_gsc_proxy_component_ops = {
.unbind = xe_gsc_proxy_component_unbind, .unbind = xe_gsc_proxy_component_unbind,
}; };
static void proxy_channel_free(struct drm_device *drm, void *arg)
{
struct xe_gsc *gsc = arg;
if (!gsc->proxy.bo)
return;
if (gsc->proxy.to_csme) {
kfree(gsc->proxy.to_csme);
gsc->proxy.to_csme = NULL;
gsc->proxy.from_csme = NULL;
}
if (gsc->proxy.bo) {
iosys_map_clear(&gsc->proxy.to_gsc);
iosys_map_clear(&gsc->proxy.from_gsc);
xe_bo_unpin_map_no_vm(gsc->proxy.bo);
gsc->proxy.bo = NULL;
}
}
static int proxy_channel_alloc(struct xe_gsc *gsc) static int proxy_channel_alloc(struct xe_gsc *gsc)
{ {
struct xe_gt *gt = gsc_to_gt(gsc); struct xe_gt *gt = gsc_to_gt(gsc);
@ -400,18 +379,15 @@ static int proxy_channel_alloc(struct xe_gsc *gsc)
struct xe_bo *bo; struct xe_bo *bo;
void *csme; void *csme;
csme = kzalloc(GSC_PROXY_CHANNEL_SIZE, GFP_KERNEL); csme = drmm_kzalloc(&xe->drm, GSC_PROXY_CHANNEL_SIZE, GFP_KERNEL);
if (!csme) if (!csme)
return -ENOMEM; return -ENOMEM;
bo = xe_bo_create_pin_map(xe, tile, NULL, GSC_PROXY_CHANNEL_SIZE, bo = xe_managed_bo_create_pin_map(xe, tile, GSC_PROXY_CHANNEL_SIZE,
ttm_bo_type_kernel, XE_BO_FLAG_SYSTEM |
XE_BO_FLAG_SYSTEM | XE_BO_FLAG_GGTT);
XE_BO_FLAG_GGTT); if (IS_ERR(bo))
if (IS_ERR(bo)) {
kfree(csme);
return PTR_ERR(bo); return PTR_ERR(bo);
}
gsc->proxy.bo = bo; gsc->proxy.bo = bo;
gsc->proxy.to_gsc = IOSYS_MAP_INIT_OFFSET(&bo->vmap, 0); gsc->proxy.to_gsc = IOSYS_MAP_INIT_OFFSET(&bo->vmap, 0);
@ -419,7 +395,7 @@ static int proxy_channel_alloc(struct xe_gsc *gsc)
gsc->proxy.to_csme = csme; gsc->proxy.to_csme = csme;
gsc->proxy.from_csme = csme + GSC_PROXY_BUFFER_SIZE; gsc->proxy.from_csme = csme + GSC_PROXY_BUFFER_SIZE;
return drmm_add_action_or_reset(&xe->drm, proxy_channel_free, gsc); return 0;
} }
/** /**

19
drivers/gpu/drm/xe/xe_huc.c
View File

@ -43,14 +43,6 @@ huc_to_guc(struct xe_huc *huc)
return &container_of(huc, struct xe_uc, huc)->guc; return &container_of(huc, struct xe_uc, huc)->guc;
} }
static void free_gsc_pkt(struct drm_device *drm, void *arg)
{
struct xe_huc *huc = arg;
xe_bo_unpin_map_no_vm(huc->gsc_pkt);
huc->gsc_pkt = NULL;
}
#define PXP43_HUC_AUTH_INOUT_SIZE SZ_4K #define PXP43_HUC_AUTH_INOUT_SIZE SZ_4K
static int huc_alloc_gsc_pkt(struct xe_huc *huc) static int huc_alloc_gsc_pkt(struct xe_huc *huc)
{ {
@ -59,17 +51,16 @@ static int huc_alloc_gsc_pkt(struct xe_huc *huc)
struct xe_bo *bo; struct xe_bo *bo;
/* we use a single object for both input and output */ /* we use a single object for both input and output */
bo = xe_bo_create_pin_map(xe, gt_to_tile(gt), NULL, bo = xe_managed_bo_create_pin_map(xe, gt_to_tile(gt),
PXP43_HUC_AUTH_INOUT_SIZE * 2, PXP43_HUC_AUTH_INOUT_SIZE * 2,
ttm_bo_type_kernel, XE_BO_FLAG_SYSTEM |
XE_BO_FLAG_SYSTEM | XE_BO_FLAG_GGTT);
XE_BO_FLAG_GGTT);
if (IS_ERR(bo)) if (IS_ERR(bo))
return PTR_ERR(bo); return PTR_ERR(bo);
huc->gsc_pkt = bo; huc->gsc_pkt = bo;
return drmm_add_action_or_reset(&xe->drm, free_gsc_pkt, huc); return 0;
} }
int xe_huc_init(struct xe_huc *huc) int xe_huc_init(struct xe_huc *huc)