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gpio: tegra186: remove unneeded loop in tegra186_gpio_init_route_mapping()
Reviewing the j loop over num_irqs_per_bank, in the code previous
to the fixes: commit, every j was used. now only when j == 0.
If only j == 0 is used, there is no need for the loop.
Fixes: 2103868047
("gpio: tegra186: Support multiple interrupts per bank")
Signed-off-by: Tom Rix <trix@redhat.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
This commit is contained in:
parent
eed5a3bfaf
commit
2e539b735d
@ -677,7 +677,7 @@ static const struct of_device_id tegra186_pmc_of_match[] = {
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static void tegra186_gpio_init_route_mapping(struct tegra_gpio *gpio)
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{
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struct device *dev = gpio->gpio.parent;
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unsigned int i, j;
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unsigned int i;
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u32 value;
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for (i = 0; i < gpio->soc->num_ports; i++) {
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@ -699,27 +699,23 @@ static void tegra186_gpio_init_route_mapping(struct tegra_gpio *gpio)
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* On Tegra194 and later, each pin can be routed to one or more
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* interrupts.
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*/
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for (j = 0; j < gpio->num_irqs_per_bank; j++) {
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dev_dbg(dev, "programming default interrupt routing for port %s\n",
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port->name);
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dev_dbg(dev, "programming default interrupt routing for port %s\n",
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port->name);
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offset = TEGRA186_GPIO_INT_ROUTE_MAPPING(p, j);
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offset = TEGRA186_GPIO_INT_ROUTE_MAPPING(p, 0);
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/*
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* By default we only want to route GPIO pins to IRQ 0. This works
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* only under the assumption that we're running as the host kernel
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* and hence all GPIO pins are owned by Linux.
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*
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* For cases where Linux is the guest OS, the hypervisor will have
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* to configure the interrupt routing and pass only the valid
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* interrupts via device tree.
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*/
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if (j == 0) {
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value = readl(base + offset);
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value = BIT(port->pins) - 1;
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writel(value, base + offset);
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}
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}
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/*
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* By default we only want to route GPIO pins to IRQ 0. This works
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* only under the assumption that we're running as the host kernel
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* and hence all GPIO pins are owned by Linux.
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*
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* For cases where Linux is the guest OS, the hypervisor will have
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* to configure the interrupt routing and pass only the valid
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* interrupts via device tree.
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*/
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value = readl(base + offset);
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value = BIT(port->pins) - 1;
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writel(value, base + offset);
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}
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}
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}
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