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x86: change irq functions to accomodate 64-bit
This patch changes the irq handling function definitions in paravirt.h (like raw_local_irq_disable) to accomodate for x86_64. The differences are in the calling convention. Signed-off-by: Glauber de Oliveira Costa <gcosta@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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@ -1085,52 +1085,68 @@ struct paravirt_patch_site {
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extern struct paravirt_patch_site __parainstructions[],
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__parainstructions_end[];
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#ifdef CONFIG_X86_32
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#define PV_SAVE_REGS "pushl %%ecx; pushl %%edx;"
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#define PV_RESTORE_REGS "popl %%edx; popl %%ecx"
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#define PV_FLAGS_ARG "0"
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#define PV_EXTRA_CLOBBERS
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#define PV_VEXTRA_CLOBBERS
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#else
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/* We save some registers, but all of them, that's too much. We clobber all
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* caller saved registers but the argument parameter */
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#define PV_SAVE_REGS "pushq %%rdi;"
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#define PV_RESTORE_REGS "popq %%rdi;"
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#define PV_EXTRA_CLOBBERS EXTRA_CLOBBERS, "rcx" , "rdx"
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#define PV_VEXTRA_CLOBBERS EXTRA_CLOBBERS, "rdi", "rcx" , "rdx"
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#define PV_FLAGS_ARG "D"
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#endif
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static inline unsigned long __raw_local_save_flags(void)
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{
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unsigned long f;
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asm volatile(paravirt_alt("pushl %%ecx; pushl %%edx;"
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asm volatile(paravirt_alt(PV_SAVE_REGS
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PARAVIRT_CALL
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"popl %%edx; popl %%ecx")
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PV_RESTORE_REGS)
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: "=a"(f)
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: paravirt_type(pv_irq_ops.save_fl),
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paravirt_clobber(CLBR_EAX)
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: "memory", "cc");
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: "memory", "cc" PV_VEXTRA_CLOBBERS);
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return f;
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}
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static inline void raw_local_irq_restore(unsigned long f)
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{
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asm volatile(paravirt_alt("pushl %%ecx; pushl %%edx;"
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asm volatile(paravirt_alt(PV_SAVE_REGS
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PARAVIRT_CALL
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"popl %%edx; popl %%ecx")
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PV_RESTORE_REGS)
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: "=a"(f)
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: "0"(f),
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: PV_FLAGS_ARG(f),
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paravirt_type(pv_irq_ops.restore_fl),
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paravirt_clobber(CLBR_EAX)
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: "memory", "cc");
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: "memory", "cc" PV_EXTRA_CLOBBERS);
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}
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static inline void raw_local_irq_disable(void)
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{
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asm volatile(paravirt_alt("pushl %%ecx; pushl %%edx;"
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asm volatile(paravirt_alt(PV_SAVE_REGS
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PARAVIRT_CALL
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"popl %%edx; popl %%ecx")
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PV_RESTORE_REGS)
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:
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: paravirt_type(pv_irq_ops.irq_disable),
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paravirt_clobber(CLBR_EAX)
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: "memory", "eax", "cc");
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: "memory", "eax", "cc" PV_EXTRA_CLOBBERS);
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}
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static inline void raw_local_irq_enable(void)
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{
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asm volatile(paravirt_alt("pushl %%ecx; pushl %%edx;"
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asm volatile(paravirt_alt(PV_SAVE_REGS
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PARAVIRT_CALL
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"popl %%edx; popl %%ecx")
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PV_RESTORE_REGS)
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:
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: paravirt_type(pv_irq_ops.irq_enable),
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paravirt_clobber(CLBR_EAX)
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: "memory", "eax", "cc");
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: "memory", "eax", "cc" PV_EXTRA_CLOBBERS);
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}
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static inline unsigned long __raw_local_irq_save(void)
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@ -1205,6 +1221,7 @@ static inline unsigned long __raw_local_irq_save(void)
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CLBR_NONE, \
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jmp *%cs:pv_cpu_ops+PV_CPU_irq_enable_syscall_ret)
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#ifdef CONFIG_X86_32
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#define GET_CR0_INTO_EAX \
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push %ecx; push %edx; \
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