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ARM: Keystone DTS for 4.14
Contents: - ti-sci power domain, clock and reset controller support - DSP nodes for k2h/k2l/k2e evms - DSP CMA memory pools for k2h/k2l/k2e/keg evms - MMC/hsmmc suport for k2g - eDMA support for k2g - DCAN support for k2g -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJZlOAZAAoJEHJsHOdBp5c/ZNIP/3wCj+qddu92u7PKknIKptKQ zMKfXnSI01DnjBiuUM3qD6N/ELJCmYrFs2mdYhxjSPNNzKIhMwfg6fSHMWoAmFIN juP5VGCs61e2PWOOL74vw93f1+GEWawgG8VpreeFOgkmDXM1t2jHGFdNkOQH64to B6ONt423UodLIUp8VQzEcH5sluVHErv2OwizO/EWBKAnioQDlKUIS9KDG3eXb98E oVuoso4v8WIoZQj7Rtwpj7gAjnFxCl6DbEWsD5upJ1XLmUtAjqbnGe5PZihYQolJ Klc1qqk0gJPQxfkVzesEOn6k0J5y9+SwYELX9DGnno1yDCA98InCtYdTEDENKqlr dWAvlsbC0JjaHJnC9hU83Y62rMLZsO/fTV7EZU6Cu1M2Suu8O66LFjlnx77uB21g pES0y8bPFdre5JdHXwtvLtyeaDQR2HnTwhzS3Ul1VeMP6gjsiD4FoHAYeqE7tfOE dIaYnORlvMbDE5qP7aeFR3blIPIGXtMyI1ARD+NY4uLUtOUevttCQh+pSasaJ/pF HcYdL9aH1EvTGCS+WY+oes8+6oII1YQo/ASmV200OFHrg1Ucme9iEiaeFAqrR4rO tIXtcOSR4LMjiDHqRBtw5/Ei8hiprRz4070oVAHaKQ190XpmmQe2AkgthrgsKmXM THbU5V8bDRTvNKLmYU7U =9ZLH -----END PGP SIGNATURE----- Merge tag 'keystone_dts_for_4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into next/dt Pull "ARM: Keystone DTS for 4.14" from Santosh Shilimkar: Contents: - ti-sci power domain, clock and reset controller support - DSP nodes for k2h/k2l/k2e evms - DSP CMA memory pools for k2h/k2l/k2e/keg evms - MMC/hsmmc suport for k2g - eDMA support for k2g - DCAN support for k2g * tag 'keystone_dts_for_4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone: (22 commits) ARM: dts: keystone-k2g-ice: Add and enable DSP CMA memory pool ARM: dts: keystone-k2g-evm: Add and enable DSP CMA memory pool ARM: dts: keystone-k2g: Add DSP node ARM: dts: k2g: Add DCAN nodes dt-bindings: net: c_can: Update binding for clock and power-domains property ARM: dts: keystone-k2g-evm: Enable MMC0 and MMC1 ARM: dts: keystone-k2g: add MMC0 and MMC1 nodes ARM: dts: keystone-k2g: Add eDMA nodes dt-bindings: ti,omap-hsmmc: Add 66AK2G mmc controller dt-bindings: ti,edma: Add 66AK2G specific information ARM: dts: keystone-k2g: Add gpio nodes ARM: dts: keystone-k2e-evm: Add and enable DSP CMA memory pool ARM: dts: keystone-k2l-evm: Add and enable common DSP CMA memory pool ARM: dts: keystone-k2hk-evm: Add and enable common DSP CMA memory pool ARM: dts: keystone-k2e: Add DSP node ARM: dts: keystone-k2l: Add DSP nodes ARM: dts: keystone-k2hk: Add DSP nodes ARM: dts: keystone-k2g: Add TI SCI reset-controller node ARM: dts: keystone-k2g: Add ti-sci clock provider node ARM: dts: keystone-k2g: Add ti-sci power domain node ...
This commit is contained in:
Arnd Bergmann
commit
2de8161251
@ -9,7 +9,12 @@ execute the actual DMA tansfer.
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eDMA3 Channel Controller
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Required properties:
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- compatible: "ti,edma3-tpcc" for the channel controller(s)
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--------------------
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- compatible: Should be:
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- "ti,edma3-tpcc" for the channel controller(s) on OMAP,
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AM33xx and AM43xx SoCs.
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- "ti,k2g-edma3-tpcc", "ti,edma3-tpcc" for the
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channel controller(s) on 66AK2G.
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- #dma-cells: Should be set to <2>. The first number is the DMA request
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number and the second is the TC the channel is serviced on.
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- reg: Memory map of eDMA CC
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@ -19,8 +24,19 @@ Required properties:
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- ti,tptcs: List of TPTCs associated with the eDMA in the following form:
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<&tptc_phandle TC_priority_number>. The highest priority is 0.
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SoC-specific Required properties:
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--------------------------------
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The following are mandatory properties for OMAP, AM33xx and AM43xx SoCs only:
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- ti,hwmods: Name of the hwmods associated to the eDMA CC.
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The following are mandatory properties for 66AK2G SoCs only:
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- power-domains:Should contain a phandle to a PM domain provider node
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and an args specifier containing the device id
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value. This property is as per the binding,
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Documentation/devicetree/bindings/soc/ti/sci-pm-domain.txt
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Optional properties:
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- ti,hwmods: Name of the hwmods associated to the eDMA CC
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-------------------
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- ti,edma-memcpy-channels: List of channels allocated to be used for memcpy, iow
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these channels will be SW triggered channels. See example.
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- ti,edma-reserved-slot-ranges: PaRAM slot ranges which should not be used by
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@ -31,17 +47,34 @@ Optional properties:
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eDMA3 Transfer Controller
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Required properties:
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- compatible: "ti,edma3-tptc" for the transfer controller(s)
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--------------------
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- compatible: Should be:
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- "ti,edma3-tptc" for the transfer controller(s) on OMAP,
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AM33xx and AM43xx SoCs.
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- "ti,k2g-edma3-tptc", "ti,edma3-tptc" for the
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transfer controller(s) on 66AK2G.
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- reg: Memory map of eDMA TC
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- interrupts: Interrupt number for TCerrint.
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SoC-specific Required properties:
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--------------------------------
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The following are mandatory properties for OMAP, AM33xx and AM43xx SoCs only:
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- ti,hwmods: Name of the hwmods associated to the eDMA TC.
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The following are mandatory properties for 66AK2G SoCs only:
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- power-domains:Should contain a phandle to a PM domain provider node
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and an args specifier containing the device id
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value. This property is as per the binding,
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Documentation/devicetree/bindings/soc/ti/sci-pm-domain.txt
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Optional properties:
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- ti,hwmods: Name of the hwmods associated to the given eDMA TC
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-------------------
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- interrupt-names: "edma3_tcerrint"
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------------------------------------------------------------------------------
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Example:
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Examples:
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1.
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edma: edma@49000000 {
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compatible = "ti,edma3-tpcc";
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ti,hwmods = "tpcc";
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@ -109,6 +142,58 @@ mcasp0: mcasp@48038000 {
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dma-names = "tx", "rx";
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};
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2.
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edma1: edma@02728000 {
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compatible = "ti,k2g-edma3-tpcc", "ti,edma3-tpcc";
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reg = <0x02728000 0x8000>;
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reg-names = "edma3_cc";
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interrupts = <GIC_SPI 208 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 219 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 220 IRQ_TYPE_EDGE_RISING>;
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interrupt-names = "edma3_ccint", "emda3_mperr",
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"edma3_ccerrint";
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dma-requests = <64>;
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#dma-cells = <2>;
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ti,tptcs = <&edma1_tptc0 7>, <&edma1_tptc1 0>;
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/*
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* memcpy is disabled, can be enabled with:
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* ti,edma-memcpy-channels = <12 13 14 15>;
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* for example.
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*/
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power-domains = <&k2g_pds 0x4f>;
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};
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edma1_tptc0: tptc@027b0000 {
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compatible = "ti,k2g-edma3-tptc", "ti,edma3-tptc";
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reg = <0x027b0000 0x400>;
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power-domains = <&k2g_pds 0x4f>;
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};
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edma1_tptc1: tptc@027b8000 {
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compatible = "ti, k2g-edma3-tptc", "ti,edma3-tptc";
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reg = <0x027b8000 0x400>;
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power-domains = <&k2g_pds 0x4f>;
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};
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mmc0: mmc@23000000 {
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compatible = "ti,k2g-hsmmc", "ti,omap4-hsmmc";
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reg = <0x23000000 0x400>;
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interrupts = <GIC_SPI 96 IRQ_TYPE_EDGE_RISING>;
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dmas = <&edma1 24 0>, <&edma1 25 0>;
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dma-names = "tx", "rx";
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bus-width = <4>;
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ti,needs-special-reset;
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no-1-8-v;
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max-frequency = <96000000>;
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power-domains = <&k2g_pds 0xb>;
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clocks = <&k2g_clks 0xb 1>, <&k2g_clks 0xb 2>;
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clock-names = "fck", "mmchsdb_fck";
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status = "disabled";
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};
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------------------------------------------------------------------------------
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DEPRECATED binding, new DTS files must use the ti,edma3-tpcc/ti,edma3-tptc
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binding.
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@ -1,33 +1,55 @@
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* TI Highspeed MMC host controller for OMAP
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* TI Highspeed MMC host controller for OMAP and 66AK2G family.
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The Highspeed MMC Host Controller on TI OMAP family
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The Highspeed MMC Host Controller on TI OMAP and 66AK2G family
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provides an interface for MMC, SD, and SDIO types of memory cards.
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This file documents differences between the core properties described
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by mmc.txt and the properties used by the omap_hsmmc driver.
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Required properties:
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--------------------
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- compatible:
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Should be "ti,omap2-hsmmc", for OMAP2 controllers
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Should be "ti,omap3-hsmmc", for OMAP3 controllers
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Should be "ti,omap3-pre-es3-hsmmc" for OMAP3 controllers pre ES3.0
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Should be "ti,omap4-hsmmc", for OMAP4 controllers
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Should be "ti,am33xx-hsmmc", for AM335x controllers
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- ti,hwmods: Must be "mmc<n>", n is controller instance starting 1
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Should be "ti,k2g-hsmmc", "ti,omap4-hsmmc" for 66AK2G controllers.
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SoC specific required properties:
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---------------------------------
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The following are mandatory properties for OMAPs, AM33xx and AM43xx SoCs only:
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- ti,hwmods: Must be "mmc<n>", n is controller instance starting 1.
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The following are mandatory properties for 66AK2G SoCs only:
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- power-domains:Should contain a phandle to a PM domain provider node
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and an args specifier containing the MMC device id
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value. This property is as per the binding,
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Documentation/devicetree/bindings/soc/ti/sci-pm-domain.txt
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- clocks: Must contain an entry for each entry in clock-names. Should
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be defined as per the he appropriate clock bindings consumer
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usage in Documentation/devicetree/bindings/clock/ti,sci-clk.txt
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- clock-names: Shall be "fck" for the functional clock,
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and "mmchsdb_fck" for the debounce clock.
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Optional properties:
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ti,dual-volt: boolean, supports dual voltage cards
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<supply-name>-supply: phandle to the regulator device tree node
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"supply-name" examples are "vmmc", "vmmc_aux"(deprecated)/"vqmmc" etc
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ti,non-removable: non-removable slot (like eMMC)
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ti,needs-special-reset: Requires a special softreset sequence
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ti,needs-special-hs-handling: HSMMC IP needs special setting for handling High Speed
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dmas: List of DMA specifiers with the controller specific format
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as described in the generic DMA client binding. A tx and rx
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specifier is required.
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dma-names: List of DMA request names. These strings correspond
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1:1 with the DMA specifiers listed in dmas. The string naming is
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to be "rx" and "tx" for RX and TX DMA requests, respectively.
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--------------------
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- ti,dual-volt: boolean, supports dual voltage cards
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- <supply-name>-supply: phandle to the regulator device tree node
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"supply-name" examples are "vmmc",
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"vmmc_aux"(deprecated)/"vqmmc" etc
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- ti,non-removable: non-removable slot (like eMMC)
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- ti,needs-special-reset: Requires a special softreset sequence
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- ti,needs-special-hs-handling: HSMMC IP needs special setting
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for handling High Speed
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- dmas: List of DMA specifiers with the controller specific
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format as described in the generic DMA client
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binding. A tx and rx specifier is required.
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- dma-names: List of DMA request names. These strings correspond
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1:1 with the DMA specifiers listed in dmas.
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The string naming is to be "rx" and "tx" for
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RX and TX DMA requests, respectively.
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Examples:
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@ -11,9 +11,20 @@ Required properties:
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- interrupts : property with a value describing the interrupt
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number
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Optional properties:
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The following are mandatory properties for DRA7x, AM33xx and AM43xx SoCs only:
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- ti,hwmods : Must be "d_can<n>" or "c_can<n>", n being the
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instance number
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The following are mandatory properties for Keystone 2 66AK2G SoCs only:
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- power-domains : Should contain a phandle to a PM domain provider node
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and an args specifier containing the DCAN device id
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value. This property is as per the binding,
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Documentation/devicetree/bindings/soc/ti/sci-pm-domain.txt
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- clocks : CAN functional clock phandle. This property is as per the
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binding,
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Documentation/devicetree/bindings/clock/ti,sci-clk.txt
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Optional properties:
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- syscon-raminit : Handle to system control region that contains the
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RAMINIT register, register offset to the RAMINIT
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register and the CAN instance number (0 offset).
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@ -46,12 +46,13 @@ Required Properties:
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- power-domains: phandle pointing to the corresponding PM domain node
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and an ID representing the device.
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See dt-bindings/genpd/k2g.h for the list of valid identifiers for k2g.
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See http://processors.wiki.ti.com/index.php/TISCI#66AK2G02_Data for the list
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of valid identifiers for k2g.
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Example (K2G):
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--------------------
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uart0: serial@02530c00 {
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compatible = "ns16550a";
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...
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power-domains = <&k2g_pds K2G_DEV_UART0>;
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power-domains = <&k2g_pds 0x002c>;
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};
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@ -16,6 +16,19 @@
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compatible = "ti,k2e-evm", "ti,k2e", "ti,keystone";
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model = "Texas Instruments Keystone 2 Edison EVM";
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reserved-memory {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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dsp_common_memory: dsp-common-memory@81f800000 {
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compatible = "shared-dma-pool";
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reg = <0x00000008 0x1f800000 0x00000000 0x800000>;
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reusable;
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status = "okay";
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};
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};
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soc {
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clocks {
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@ -160,3 +173,8 @@
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reg = <1>;
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};
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};
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&dsp0 {
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memory-region = <&dsp_common_memory>;
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status = "okay";
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};
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@ -45,6 +45,10 @@
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};
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};
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aliases {
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rproc0 = &dsp0;
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};
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soc {
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/include/ "keystone-k2e-clocks.dtsi"
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@ -114,6 +118,22 @@
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gpio,syscon-dev = <&devctrl 0x240>;
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};
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dsp0: dsp@10800000 {
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compatible = "ti,k2e-dsp";
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reg = <0x10800000 0x00080000>,
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<0x10e00000 0x00008000>,
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<0x10f00000 0x00008000>;
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reg-names = "l2sram", "l1pram", "l1dram";
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clocks = <&clkgem0>;
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ti,syscon-dev = <&devctrl 0x844>;
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resets = <&pscrst 0>;
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interrupt-parent = <&kirq0>;
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interrupts = <0 8>;
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interrupt-names = "vring", "exception";
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kick-gpios = <&dspgpio0 27 0>;
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status = "disabled";
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};
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pcie1: pcie@21020000 {
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compatible = "ti,keystone-pcie","snps,dw-pcie";
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clocks = <&clkpcie1>;
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@ -25,6 +25,26 @@
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reg = <0x00000008 0x00000000 0x00000000 0x80000000>;
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};
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reserved-memory {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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dsp_common_memory: dsp-common-memory@81f800000 {
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compatible = "shared-dma-pool";
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reg = <0x00000008 0x1f800000 0x00000000 0x800000>;
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reusable;
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status = "okay";
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};
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};
|
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|
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vcc3v3_dcin_reg: fixedregulator-vcc3v3-dcin {
|
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compatible = "regulator-fixed";
|
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regulator-name = "mmc0_fixed";
|
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regulator-min-microvolt = <3300000>;
|
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regulator-max-microvolt = <3300000>;
|
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regulator-always-on;
|
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};
|
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};
|
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|
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&k2g_pinctrl {
|
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@ -34,6 +54,33 @@
|
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K2G_CORE_IOPAD(0x11d0) (BUFFER_CLASS_B | PIN_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
|
||||
>;
|
||||
};
|
||||
|
||||
mmc0_pins: pinmux_mmc0_pins {
|
||||
pinctrl-single,pins = <
|
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K2G_CORE_IOPAD(0x1300) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE2) /* mmc0_dat3.mmc0_dat3 */
|
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K2G_CORE_IOPAD(0x1304) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE2) /* mmc0_dat2.mmc0_dat2 */
|
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K2G_CORE_IOPAD(0x1308) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE2) /* mmc0_dat1.mmc0_dat1 */
|
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K2G_CORE_IOPAD(0x130c) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE2) /* mmc0_dat0.mmc0_dat0 */
|
||||
K2G_CORE_IOPAD(0x1310) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE2) /* mmc0_clk.mmc0_clk */
|
||||
K2G_CORE_IOPAD(0x1314) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE2) /* mmc0_cmd.mmc0_cmd */
|
||||
K2G_CORE_IOPAD(0x12ec) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE3) /* mmc0_sdcd.gpio1_12 */
|
||||
>;
|
||||
};
|
||||
|
||||
mmc1_pins: pinmux_mmc1_pins {
|
||||
pinctrl-single,pins = <
|
||||
K2G_CORE_IOPAD(0x10ec) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* mmc1_dat7.mmc1_dat7 */
|
||||
K2G_CORE_IOPAD(0x10f0) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* mmc1_dat6.mmc1_dat6 */
|
||||
K2G_CORE_IOPAD(0x10f4) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* mmc1_dat5.mmc1_dat5 */
|
||||
K2G_CORE_IOPAD(0x10f8) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* mmc1_dat4.mmc1_dat4 */
|
||||
K2G_CORE_IOPAD(0x10fc) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* mmc1_dat3.mmc1_dat3 */
|
||||
K2G_CORE_IOPAD(0x1100) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* mmc1_dat2.mmc1_dat2 */
|
||||
K2G_CORE_IOPAD(0x1104) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* mmc1_dat1.mmc1_dat1 */
|
||||
K2G_CORE_IOPAD(0x1108) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* mmc1_dat0.mmc1_dat0 */
|
||||
K2G_CORE_IOPAD(0x110c) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* mmc1_clk.mmc1_clk */
|
||||
K2G_CORE_IOPAD(0x1110) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* mmc1_cmd.mmc1_cmd */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
@ -41,3 +88,27 @@
|
||||
pinctrl-0 = <&uart0_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&gpio1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mmc0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc0_pins>;
|
||||
vmmc-supply = <&vcc3v3_dcin_reg>;
|
||||
cd-gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mmc1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc1_pins>;
|
||||
vmmc-supply = <&vcc3v3_dcin_reg>; /* VCC3V3_EMMC is connected to VCC3V3_DCIN */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dsp0 {
|
||||
memory-region = <&dsp_common_memory>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
@ -17,6 +17,19 @@
|
||||
device_type = "memory";
|
||||
reg = <0x00000008 0x00000000 0x00000000 0x20000000>;
|
||||
};
|
||||
|
||||
reserved-memory {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
|
||||
dsp_common_memory: dsp-common-memory@81f800000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x00000008 0x1f800000 0x00000000 0x800000>;
|
||||
reusable;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&k2g_pinctrl {
|
||||
@ -33,3 +46,8 @@
|
||||
pinctrl-0 = <&uart0_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dsp0 {
|
||||
memory-region = <&dsp_common_memory>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
@ -15,6 +15,7 @@
|
||||
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/pinctrl/keystone.h>
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
/ {
|
||||
compatible = "ti,k2g","ti,keystone";
|
||||
@ -27,6 +28,7 @@
|
||||
|
||||
aliases {
|
||||
serial0 = &uart0;
|
||||
rproc0 = &dsp0;
|
||||
};
|
||||
|
||||
cpus {
|
||||
@ -113,6 +115,24 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
dcan0: can@0260B200 {
|
||||
compatible = "ti,am4372-d_can", "ti,am3352-d_can";
|
||||
reg = <0x0260B200 0x200>;
|
||||
interrupts = <GIC_SPI 190 IRQ_TYPE_EDGE_RISING>;
|
||||
status = "disabled";
|
||||
power-domains = <&k2g_pds 0x0008>;
|
||||
clocks = <&k2g_clks 0x0008 1>;
|
||||
};
|
||||
|
||||
dcan1: can@0260B400 {
|
||||
compatible = "ti,am4372-d_can", "ti,am3352-d_can";
|
||||
reg = <0x0260B400 0x200>;
|
||||
interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>;
|
||||
status = "disabled";
|
||||
power-domains = <&k2g_pds 0x0009>;
|
||||
clocks = <&k2g_clks 0x0009 1>;
|
||||
};
|
||||
|
||||
kirq0: keystone_irq@026202a0 {
|
||||
compatible = "ti,keystone-irq";
|
||||
interrupts = <GIC_SPI 1 IRQ_TYPE_EDGE_RISING>;
|
||||
@ -128,6 +148,22 @@
|
||||
gpio,syscon-dev = <&devctrl 0x240>;
|
||||
};
|
||||
|
||||
dsp0: dsp@10800000 {
|
||||
compatible = "ti,k2g-dsp";
|
||||
reg = <0x10800000 0x00100000>,
|
||||
<0x10e00000 0x00008000>,
|
||||
<0x10f00000 0x00008000>;
|
||||
reg-names = "l2sram", "l1pram", "l1dram";
|
||||
power-domains = <&k2g_pds 0x0046>;
|
||||
ti,syscon-dev = <&devctrl 0x844>;
|
||||
resets = <&k2g_reset 0x0046 0x1>;
|
||||
interrupt-parent = <&kirq0>;
|
||||
interrupts = <0 8>;
|
||||
interrupt-names = "vring", "exception";
|
||||
kick-gpios = <&dspgpio0 27 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
msgmgr: msgmgr@02a00000 {
|
||||
compatible = "ti,k2g-message-manager";
|
||||
#mbox-cells = <2>;
|
||||
@ -139,5 +175,173 @@
|
||||
interrupts = <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
pmmc: pmmc@02921c00 {
|
||||
compatible = "ti,k2g-sci";
|
||||
/*
|
||||
* In case of rare platforms that does not use k2g as
|
||||
* system master, use /delete-property/
|
||||
*/
|
||||
ti,system-reboot-controller;
|
||||
mbox-names = "rx", "tx";
|
||||
mboxes= <&msgmgr 5 2>,
|
||||
<&msgmgr 0 0>;
|
||||
reg-names = "debug_messages";
|
||||
reg = <0x02921c00 0x400>;
|
||||
|
||||
k2g_pds: power-controller {
|
||||
compatible = "ti,sci-pm-domain";
|
||||
#power-domain-cells = <1>;
|
||||
};
|
||||
|
||||
k2g_clks: clocks {
|
||||
compatible = "ti,k2g-sci-clk";
|
||||
#clock-cells = <2>;
|
||||
};
|
||||
|
||||
k2g_reset: reset-controller {
|
||||
compatible = "ti,sci-reset";
|
||||
#reset-cells = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
gpio0: gpio@2603000 {
|
||||
compatible = "ti,k2g-gpio", "ti,keystone-gpio";
|
||||
reg = <0x02603000 0x100>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
|
||||
interrupts = <GIC_SPI 432 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 433 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 434 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 435 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 436 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 437 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 438 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 439 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 440 IRQ_TYPE_EDGE_RISING>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
ti,ngpio = <144>;
|
||||
ti,davinci-gpio-unbanked = <0>;
|
||||
clocks = <&k2g_clks 0x001b 0x0>;
|
||||
clock-names = "gpio";
|
||||
};
|
||||
|
||||
gpio1: gpio@260a000 {
|
||||
compatible = "ti,k2g-gpio", "ti,keystone-gpio";
|
||||
reg = <0x0260a000 0x100>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupts = <GIC_SPI 442 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 443 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 444 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 445 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 446 IRQ_TYPE_EDGE_RISING>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
ti,ngpio = <68>;
|
||||
ti,davinci-gpio-unbanked = <0>;
|
||||
clocks = <&k2g_clks 0x001c 0x0>;
|
||||
clock-names = "gpio";
|
||||
};
|
||||
|
||||
edma0: edma@02700000 {
|
||||
compatible = "ti,k2g-edma3-tpcc", "ti,edma3-tpcc";
|
||||
reg = <0x02700000 0x8000>;
|
||||
reg-names = "edma3_cc";
|
||||
interrupts = <GIC_SPI 200 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 216 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 217 IRQ_TYPE_EDGE_RISING>;
|
||||
interrupt-names = "edma3_ccint", "emda3_mperr",
|
||||
"edma3_ccerrint";
|
||||
dma-requests = <64>;
|
||||
#dma-cells = <2>;
|
||||
|
||||
ti,tptcs = <&edma0_tptc0 7>, <&edma0_tptc1 0>;
|
||||
|
||||
ti,edma-memcpy-channels = <32 33 34 35>;
|
||||
|
||||
power-domains = <&k2g_pds 0x3f>;
|
||||
};
|
||||
|
||||
edma0_tptc0: tptc@02760000 {
|
||||
compatible = "ti,k2g-edma3-tptc", "ti,edma3-tptc";
|
||||
reg = <0x02760000 0x400>;
|
||||
power-domains = <&k2g_pds 0x3f>;
|
||||
};
|
||||
|
||||
edma0_tptc1: tptc@02768000 {
|
||||
compatible = "ti,k2g-edma3-tptc", "ti,edma3-tptc";
|
||||
reg = <0x02768000 0x400>;
|
||||
power-domains = <&k2g_pds 0x3f>;
|
||||
};
|
||||
|
||||
edma1: edma@02728000 {
|
||||
compatible = "ti,k2g-edma3-tpcc", "ti,edma3-tpcc";
|
||||
reg = <0x02728000 0x8000>;
|
||||
reg-names = "edma3_cc";
|
||||
interrupts = <GIC_SPI 208 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 219 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 220 IRQ_TYPE_EDGE_RISING>;
|
||||
interrupt-names = "edma3_ccint", "emda3_mperr",
|
||||
"edma3_ccerrint";
|
||||
dma-requests = <64>;
|
||||
#dma-cells = <2>;
|
||||
|
||||
ti,tptcs = <&edma1_tptc0 7>, <&edma1_tptc1 0>;
|
||||
|
||||
/*
|
||||
* memcpy is disabled, can be enabled with:
|
||||
* ti,edma-memcpy-channels = <12 13 14 15>;
|
||||
* for example.
|
||||
*/
|
||||
|
||||
power-domains = <&k2g_pds 0x4f>;
|
||||
};
|
||||
|
||||
edma1_tptc0: tptc@027b0000 {
|
||||
compatible = "ti,k2g-edma3-tptc", "ti,edma3-tptc";
|
||||
reg = <0x027b0000 0x400>;
|
||||
power-domains = <&k2g_pds 0x4f>;
|
||||
};
|
||||
|
||||
edma1_tptc1: tptc@027b8000 {
|
||||
compatible = "ti,k2g-edma3-tptc", "ti,edma3-tptc";
|
||||
reg = <0x027b8000 0x400>;
|
||||
power-domains = <&k2g_pds 0x4f>;
|
||||
};
|
||||
|
||||
mmc0: mmc@23000000 {
|
||||
compatible = "ti,k2g-hsmmc", "ti,omap4-hsmmc";
|
||||
reg = <0x23000000 0x400>;
|
||||
interrupts = <GIC_SPI 96 IRQ_TYPE_EDGE_RISING>;
|
||||
dmas = <&edma1 24 0>, <&edma1 25 0>;
|
||||
dma-names = "tx", "rx";
|
||||
bus-width = <4>;
|
||||
ti,needs-special-reset;
|
||||
no-1-8-v;
|
||||
max-frequency = <96000000>;
|
||||
power-domains = <&k2g_pds 0xb>;
|
||||
clocks = <&k2g_clks 0xb 1>, <&k2g_clks 0xb 2>;
|
||||
clock-names = "fck", "mmchsdb_fck";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mmc1: mmc@23100000 {
|
||||
compatible = "ti,k2g-hsmmc", "ti,omap4-hsmmc";
|
||||
reg = <0x23100000 0x400>;
|
||||
interrupts = <GIC_SPI 97 IRQ_TYPE_EDGE_RISING>;
|
||||
dmas = <&edma1 26 0>, <&edma1 27 0>;
|
||||
dma-names = "tx", "rx";
|
||||
bus-width = <8>;
|
||||
ti,needs-special-reset;
|
||||
ti,non-removable;
|
||||
max-frequency = <96000000>;
|
||||
power-domains = <&k2g_pds 0xc>;
|
||||
clocks = <&k2g_clks 0xc 1>, <&k2g_clks 0xc 2>;
|
||||
clock-names = "fck", "mmchsdb_fck";
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@ -16,6 +16,19 @@
|
||||
compatible = "ti,k2hk-evm", "ti,k2hk", "ti,keystone";
|
||||
model = "Texas Instruments Keystone 2 Kepler/Hawking EVM";
|
||||
|
||||
reserved-memory {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
|
||||
dsp_common_memory: dsp-common-memory@81f800000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x00000008 0x1f800000 0x00000000 0x800000>;
|
||||
reusable;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
soc {
|
||||
clocks {
|
||||
refclksys: refclksys {
|
||||
@ -184,3 +197,43 @@
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
&dsp0 {
|
||||
memory-region = <&dsp_common_memory>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dsp1 {
|
||||
memory-region = <&dsp_common_memory>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dsp2 {
|
||||
memory-region = <&dsp_common_memory>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dsp3 {
|
||||
memory-region = <&dsp_common_memory>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dsp4 {
|
||||
memory-region = <&dsp_common_memory>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dsp5 {
|
||||
memory-region = <&dsp_common_memory>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dsp6 {
|
||||
memory-region = <&dsp_common_memory>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dsp7 {
|
||||
memory-region = <&dsp_common_memory>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
@ -45,6 +45,17 @@
|
||||
};
|
||||
};
|
||||
|
||||
aliases {
|
||||
rproc0 = &dsp0;
|
||||
rproc1 = &dsp1;
|
||||
rproc2 = &dsp2;
|
||||
rproc3 = &dsp3;
|
||||
rproc4 = &dsp4;
|
||||
rproc5 = &dsp5;
|
||||
rproc6 = &dsp6;
|
||||
rproc7 = &dsp7;
|
||||
};
|
||||
|
||||
soc {
|
||||
/include/ "keystone-k2hk-clocks.dtsi"
|
||||
|
||||
@ -134,6 +145,134 @@
|
||||
gpio,syscon-dev = <&devctrl 0x25c>;
|
||||
};
|
||||
|
||||
dsp0: dsp@10800000 {
|
||||
compatible = "ti,k2hk-dsp";
|
||||
reg = <0x10800000 0x00100000>,
|
||||
<0x10e00000 0x00008000>,
|
||||
<0x10f00000 0x00008000>;
|
||||
reg-names = "l2sram", "l1pram", "l1dram";
|
||||
clocks = <&clkgem0>;
|
||||
ti,syscon-dev = <&devctrl 0x40>;
|
||||
resets = <&pscrst 0>;
|
||||
interrupt-parent = <&kirq0>;
|
||||
interrupts = <0 8>;
|
||||
interrupt-names = "vring", "exception";
|
||||
kick-gpios = <&dspgpio0 27 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
dsp1: dsp@11800000 {
|
||||
compatible = "ti,k2hk-dsp";
|
||||
reg = <0x11800000 0x00100000>,
|
||||
<0x11e00000 0x00008000>,
|
||||
<0x11f00000 0x00008000>;
|
||||
reg-names = "l2sram", "l1pram", "l1dram";
|
||||
clocks = <&clkgem1>;
|
||||
ti,syscon-dev = <&devctrl 0x44>;
|
||||
resets = <&pscrst 1>;
|
||||
interrupt-parent = <&kirq0>;
|
||||
interrupts = <1 9>;
|
||||
interrupt-names = "vring", "exception";
|
||||
kick-gpios = <&dspgpio1 27 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
dsp2: dsp@12800000 {
|
||||
compatible = "ti,k2hk-dsp";
|
||||
reg = <0x12800000 0x00100000>,
|
||||
<0x12e00000 0x00008000>,
|
||||
<0x12f00000 0x00008000>;
|
||||
reg-names = "l2sram", "l1pram", "l1dram";
|
||||
clocks = <&clkgem2>;
|
||||
ti,syscon-dev = <&devctrl 0x48>;
|
||||
resets = <&pscrst 2>;
|
||||
interrupt-parent = <&kirq0>;
|
||||
interrupts = <2 10>;
|
||||
interrupt-names = "vring", "exception";
|
||||
kick-gpios = <&dspgpio2 27 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
dsp3: dsp@13800000 {
|
||||
compatible = "ti,k2hk-dsp";
|
||||
reg = <0x13800000 0x00100000>,
|
||||
<0x13e00000 0x00008000>,
|
||||
<0x13f00000 0x00008000>;
|
||||
reg-names = "l2sram", "l1pram", "l1dram";
|
||||
clocks = <&clkgem3>;
|
||||
ti,syscon-dev = <&devctrl 0x4c>;
|
||||
resets = <&pscrst 3>;
|
||||
interrupt-parent = <&kirq0>;
|
||||
interrupts = <3 11>;
|
||||
interrupt-names = "vring", "exception";
|
||||
kick-gpios = <&dspgpio3 27 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
dsp4: dsp@14800000 {
|
||||
compatible = "ti,k2hk-dsp";
|
||||
reg = <0x14800000 0x00100000>,
|
||||
<0x14e00000 0x00008000>,
|
||||
<0x14f00000 0x00008000>;
|
||||
reg-names = "l2sram", "l1pram", "l1dram";
|
||||
clocks = <&clkgem4>;
|
||||
ti,syscon-dev = <&devctrl 0x50>;
|
||||
resets = <&pscrst 4>;
|
||||
interrupt-parent = <&kirq0>;
|
||||
interrupts = <4 12>;
|
||||
interrupt-names = "vring", "exception";
|
||||
kick-gpios = <&dspgpio4 27 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
dsp5: dsp@15800000 {
|
||||
compatible = "ti,k2hk-dsp";
|
||||
reg = <0x15800000 0x00100000>,
|
||||
<0x15e00000 0x00008000>,
|
||||
<0x15f00000 0x00008000>;
|
||||
reg-names = "l2sram", "l1pram", "l1dram";
|
||||
clocks = <&clkgem5>;
|
||||
ti,syscon-dev = <&devctrl 0x54>;
|
||||
resets = <&pscrst 5>;
|
||||
interrupt-parent = <&kirq0>;
|
||||
interrupts = <5 13>;
|
||||
interrupt-names = "vring", "exception";
|
||||
kick-gpios = <&dspgpio5 27 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
dsp6: dsp@16800000 {
|
||||
compatible = "ti,k2hk-dsp";
|
||||
reg = <0x16800000 0x00100000>,
|
||||
<0x16e00000 0x00008000>,
|
||||
<0x16f00000 0x00008000>;
|
||||
reg-names = "l2sram", "l1pram", "l1dram";
|
||||
clocks = <&clkgem6>;
|
||||
ti,syscon-dev = <&devctrl 0x58>;
|
||||
resets = <&pscrst 6>;
|
||||
interrupt-parent = <&kirq0>;
|
||||
interrupts = <6 14>;
|
||||
interrupt-names = "vring", "exception";
|
||||
kick-gpios = <&dspgpio6 27 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
dsp7: dsp@17800000 {
|
||||
compatible = "ti,k2hk-dsp";
|
||||
reg = <0x17800000 0x00100000>,
|
||||
<0x17e00000 0x00008000>,
|
||||
<0x17f00000 0x00008000>;
|
||||
reg-names = "l2sram", "l1pram", "l1dram";
|
||||
clocks = <&clkgem7>;
|
||||
ti,syscon-dev = <&devctrl 0x5c>;
|
||||
resets = <&pscrst 7>;
|
||||
interrupt-parent = <&kirq0>;
|
||||
interrupts = <7 15>;
|
||||
interrupt-names = "vring", "exception";
|
||||
kick-gpios = <&dspgpio7 27 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mdio: mdio@02090300 {
|
||||
compatible = "ti,keystone_mdio", "ti,davinci_mdio";
|
||||
#address-cells = <1>;
|
||||
|
||||
@ -16,6 +16,19 @@
|
||||
compatible = "ti,k2l-evm", "ti,k2l", "ti,keystone";
|
||||
model = "Texas Instruments Keystone 2 Lamarr EVM";
|
||||
|
||||
reserved-memory {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
|
||||
dsp_common_memory: dsp-common-memory@81f800000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x00000008 0x1f800000 0x00000000 0x800000>;
|
||||
reusable;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
soc {
|
||||
clocks {
|
||||
refclksys: refclksys {
|
||||
@ -133,3 +146,23 @@
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
&dsp0 {
|
||||
memory-region = <&dsp_common_memory>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dsp1 {
|
||||
memory-region = <&dsp_common_memory>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dsp2 {
|
||||
memory-region = <&dsp_common_memory>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dsp3 {
|
||||
memory-region = <&dsp_common_memory>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
@ -33,6 +33,13 @@
|
||||
};
|
||||
};
|
||||
|
||||
aliases {
|
||||
rproc0 = &dsp0;
|
||||
rproc1 = &dsp1;
|
||||
rproc2 = &dsp2;
|
||||
rproc3 = &dsp3;
|
||||
};
|
||||
|
||||
soc {
|
||||
/include/ "keystone-k2l-clocks.dtsi"
|
||||
|
||||
@ -268,6 +275,70 @@
|
||||
gpio,syscon-dev = <&devctrl 0x24c>;
|
||||
};
|
||||
|
||||
dsp0: dsp@10800000 {
|
||||
compatible = "ti,k2l-dsp";
|
||||
reg = <0x10800000 0x00100000>,
|
||||
<0x10e00000 0x00008000>,
|
||||
<0x10f00000 0x00008000>;
|
||||
reg-names = "l2sram", "l1pram", "l1dram";
|
||||
clocks = <&clkgem0>;
|
||||
ti,syscon-dev = <&devctrl 0x844>;
|
||||
resets = <&pscrst 0>;
|
||||
interrupt-parent = <&kirq0>;
|
||||
interrupts = <0 8>;
|
||||
interrupt-names = "vring", "exception";
|
||||
kick-gpios = <&dspgpio0 27 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
dsp1: dsp@11800000 {
|
||||
compatible = "ti,k2l-dsp";
|
||||
reg = <0x11800000 0x00100000>,
|
||||
<0x11e00000 0x00008000>,
|
||||
<0x11f00000 0x00008000>;
|
||||
reg-names = "l2sram", "l1pram", "l1dram";
|
||||
clocks = <&clkgem1>;
|
||||
ti,syscon-dev = <&devctrl 0x848>;
|
||||
resets = <&pscrst 1>;
|
||||
interrupt-parent = <&kirq0>;
|
||||
interrupts = <1 9>;
|
||||
interrupt-names = "vring", "exception";
|
||||
kick-gpios = <&dspgpio1 27 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
dsp2: dsp@12800000 {
|
||||
compatible = "ti,k2l-dsp";
|
||||
reg = <0x12800000 0x00100000>,
|
||||
<0x12e00000 0x00008000>,
|
||||
<0x12f00000 0x00008000>;
|
||||
reg-names = "l2sram", "l1pram", "l1dram";
|
||||
clocks = <&clkgem2>;
|
||||
ti,syscon-dev = <&devctrl 0x84c>;
|
||||
resets = <&pscrst 2>;
|
||||
interrupt-parent = <&kirq0>;
|
||||
interrupts = <2 10>;
|
||||
interrupt-names = "vring", "exception";
|
||||
kick-gpios = <&dspgpio2 27 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
dsp3: dsp@13800000 {
|
||||
compatible = "ti,k2l-dsp";
|
||||
reg = <0x13800000 0x00100000>,
|
||||
<0x13e00000 0x00008000>,
|
||||
<0x13f00000 0x00008000>;
|
||||
reg-names = "l2sram", "l1pram", "l1dram";
|
||||
clocks = <&clkgem3>;
|
||||
ti,syscon-dev = <&devctrl 0x850>;
|
||||
resets = <&pscrst 3>;
|
||||
interrupt-parent = <&kirq0>;
|
||||
interrupts = <3 11>;
|
||||
interrupt-names = "vring", "exception";
|
||||
kick-gpios = <&dspgpio3 27 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mdio: mdio@26200f00 {
|
||||
compatible = "ti,keystone_mdio", "ti,davinci_mdio";
|
||||
#address-cells = <1>;
|
||||
|
||||
@ -1,90 +0,0 @@
|
||||
/*
|
||||
* TI K2G SoC Device definitions
|
||||
*
|
||||
* Copyright (C) 2015-2017 Texas Instruments Incorporated - http://www.ti.com/
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#ifndef _DT_BINDINGS_GENPD_K2G_H
|
||||
#define _DT_BINDINGS_GENPD_K2G_H
|
||||
|
||||
/* Documented in http://processors.wiki.ti.com/index.php/TISCI */
|
||||
|
||||
#define K2G_DEV_PMMC0 0x0000
|
||||
#define K2G_DEV_MLB0 0x0001
|
||||
#define K2G_DEV_DSS0 0x0002
|
||||
#define K2G_DEV_MCBSP0 0x0003
|
||||
#define K2G_DEV_MCASP0 0x0004
|
||||
#define K2G_DEV_MCASP1 0x0005
|
||||
#define K2G_DEV_MCASP2 0x0006
|
||||
#define K2G_DEV_DCAN0 0x0008
|
||||
#define K2G_DEV_DCAN1 0x0009
|
||||
#define K2G_DEV_EMIF0 0x000a
|
||||
#define K2G_DEV_MMCHS0 0x000b
|
||||
#define K2G_DEV_MMCHS1 0x000c
|
||||
#define K2G_DEV_GPMC0 0x000d
|
||||
#define K2G_DEV_ELM0 0x000e
|
||||
#define K2G_DEV_SPI0 0x0010
|
||||
#define K2G_DEV_SPI1 0x0011
|
||||
#define K2G_DEV_SPI2 0x0012
|
||||
#define K2G_DEV_SPI3 0x0013
|
||||
#define K2G_DEV_ICSS0 0x0014
|
||||
#define K2G_DEV_ICSS1 0x0015
|
||||
#define K2G_DEV_USB0 0x0016
|
||||
#define K2G_DEV_USB1 0x0017
|
||||
#define K2G_DEV_NSS0 0x0018
|
||||
#define K2G_DEV_PCIE0 0x0019
|
||||
#define K2G_DEV_GPIO0 0x001b
|
||||
#define K2G_DEV_GPIO1 0x001c
|
||||
#define K2G_DEV_TIMER64_0 0x001d
|
||||
#define K2G_DEV_TIMER64_1 0x001e
|
||||
#define K2G_DEV_TIMER64_2 0x001f
|
||||
#define K2G_DEV_TIMER64_3 0x0020
|
||||
#define K2G_DEV_TIMER64_4 0x0021
|
||||
#define K2G_DEV_TIMER64_5 0x0022
|
||||
#define K2G_DEV_TIMER64_6 0x0023
|
||||
#define K2G_DEV_MSGMGR0 0x0025
|
||||
#define K2G_DEV_BOOTCFG0 0x0026
|
||||
#define K2G_DEV_ARM_BOOTROM0 0x0027
|
||||
#define K2G_DEV_DSP_BOOTROM0 0x0029
|
||||
#define K2G_DEV_DEBUGSS0 0x002b
|
||||
#define K2G_DEV_UART0 0x002c
|
||||
#define K2G_DEV_UART1 0x002d
|
||||
#define K2G_DEV_UART2 0x002e
|
||||
#define K2G_DEV_EHRPWM0 0x002f
|
||||
#define K2G_DEV_EHRPWM1 0x0030
|
||||
#define K2G_DEV_EHRPWM2 0x0031
|
||||
#define K2G_DEV_EHRPWM3 0x0032
|
||||
#define K2G_DEV_EHRPWM4 0x0033
|
||||
#define K2G_DEV_EHRPWM5 0x0034
|
||||
#define K2G_DEV_EQEP0 0x0035
|
||||
#define K2G_DEV_EQEP1 0x0036
|
||||
#define K2G_DEV_EQEP2 0x0037
|
||||
#define K2G_DEV_ECAP0 0x0038
|
||||
#define K2G_DEV_ECAP1 0x0039
|
||||
#define K2G_DEV_I2C0 0x003a
|
||||
#define K2G_DEV_I2C1 0x003b
|
||||
#define K2G_DEV_I2C2 0x003c
|
||||
#define K2G_DEV_EDMA0 0x003f
|
||||
#define K2G_DEV_SEMAPHORE0 0x0040
|
||||
#define K2G_DEV_INTC0 0x0041
|
||||
#define K2G_DEV_GIC0 0x0042
|
||||
#define K2G_DEV_QSPI0 0x0043
|
||||
#define K2G_DEV_ARM_64B_COUNTER0 0x0044
|
||||
#define K2G_DEV_TETRIS0 0x0045
|
||||
#define K2G_DEV_CGEM0 0x0046
|
||||
#define K2G_DEV_MSMC0 0x0047
|
||||
#define K2G_DEV_CBASS0 0x0049
|
||||
#define K2G_DEV_BOARD0 0x004c
|
||||
#define K2G_DEV_EDMA1 0x004f
|
||||
|
||||
#endif
|
||||
Loading…
Reference in New Issue
Block a user