gpio/omap: cleanup prepare_for_idle and resume_after_idle

Since *_prepare_for_idle() and *_resume_after_idle() are called
with interrupts disabled they should be kept as simple as possible.
So, moving most of the stuff to *_runtime_suspend/resume() callbacks.

To avoid invalid context restore happening in *_runtime_resume()
callback as a result of *_get_sync() call in *_gpio_probe(), update
bank->context_loss_count. This would make context restore condition
check false in the callback and skip restore until further
initialization take place. The workaround_enabled static variable
is now a member of struct gpio_bank.

Unlike most GPIO registers the OE has 0xffffffff as the default value.
To make sure invalid context is not restored, updating the OE context
with default value.

Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Signed-off-by: Charulatha V <charu@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
This commit is contained in:
Tarun Kanti DebBarma 2011-11-24 02:44:29 +05:30
parent 065cd795d2
commit 2dc983c565

View File

@ -29,6 +29,8 @@
#include <asm/gpio.h>
#include <asm/mach/irq.h>
#define OFF_MODE 1
static LIST_HEAD(omap_gpio_list);
struct gpio_regs {
@ -73,6 +75,8 @@ struct gpio_bank {
u32 width;
int context_loss_count;
u16 id;
int power_mode;
bool workaround_enabled;
void (*set_dataout)(struct gpio_bank *bank, int gpio, int enable);
int (*get_context_loss_count)(struct device *dev);
@ -905,6 +909,8 @@ static void omap_gpio_mod_init(struct gpio_bank *bank)
if (bank->regs->debounce_en)
_gpio_rmw(base, bank->regs->debounce_en, 0, 1);
/* Save OE default value (0xffffffff) in the context */
bank->context.oe = __raw_readl(bank->base + bank->regs->direction);
/* Initialize interface clk ungated, module enabled */
if (bank->regs->ctrl)
_gpio_rmw(base, bank->regs->ctrl, 0, 1);
@ -1127,55 +1133,158 @@ static int omap_gpio_resume(struct device *dev)
}
#endif /* CONFIG_PM_SLEEP */
#if defined(CONFIG_PM_RUNTIME)
static void omap_gpio_save_context(struct gpio_bank *bank);
static void omap_gpio_restore_context(struct gpio_bank *bank);
void omap2_gpio_prepare_for_idle(int off_mode)
static int omap_gpio_runtime_suspend(struct device *dev)
{
struct platform_device *pdev = to_platform_device(dev);
struct gpio_bank *bank = platform_get_drvdata(pdev);
u32 l1 = 0, l2 = 0;
unsigned long flags;
spin_lock_irqsave(&bank->lock, flags);
if (bank->power_mode != OFF_MODE) {
bank->power_mode = 0;
goto save_gpio_context;
}
/*
* If going to OFF, remove triggering for all
* non-wakeup GPIOs. Otherwise spurious IRQs will be
* generated. See OMAP2420 Errata item 1.101.
*/
if (!(bank->enabled_non_wakeup_gpios))
goto save_gpio_context;
bank->saved_datain = __raw_readl(bank->base +
bank->regs->datain);
l1 = __raw_readl(bank->base + bank->regs->fallingdetect);
l2 = __raw_readl(bank->base + bank->regs->risingdetect);
bank->saved_fallingdetect = l1;
bank->saved_risingdetect = l2;
l1 &= ~bank->enabled_non_wakeup_gpios;
l2 &= ~bank->enabled_non_wakeup_gpios;
__raw_writel(l1, bank->base + bank->regs->fallingdetect);
__raw_writel(l2, bank->base + bank->regs->risingdetect);
bank->workaround_enabled = true;
save_gpio_context:
if (bank->get_context_loss_count)
bank->context_loss_count =
bank->get_context_loss_count(bank->dev);
omap_gpio_save_context(bank);
spin_unlock_irqrestore(&bank->lock, flags);
return 0;
}
static int omap_gpio_runtime_resume(struct device *dev)
{
struct platform_device *pdev = to_platform_device(dev);
struct gpio_bank *bank = platform_get_drvdata(pdev);
int context_lost_cnt_after;
u32 l = 0, gen, gen0, gen1;
unsigned long flags;
spin_lock_irqsave(&bank->lock, flags);
if (!bank->enabled_non_wakeup_gpios || !bank->workaround_enabled) {
spin_unlock_irqrestore(&bank->lock, flags);
return 0;
}
if (bank->get_context_loss_count) {
context_lost_cnt_after =
bank->get_context_loss_count(bank->dev);
if (context_lost_cnt_after != bank->context_loss_count ||
!context_lost_cnt_after) {
omap_gpio_restore_context(bank);
} else {
spin_unlock_irqrestore(&bank->lock, flags);
return 0;
}
}
__raw_writel(bank->saved_fallingdetect,
bank->base + bank->regs->fallingdetect);
__raw_writel(bank->saved_risingdetect,
bank->base + bank->regs->risingdetect);
l = __raw_readl(bank->base + bank->regs->datain);
/*
* Check if any of the non-wakeup interrupt GPIOs have changed
* state. If so, generate an IRQ by software. This is
* horribly racy, but it's the best we can do to work around
* this silicon bug.
*/
l ^= bank->saved_datain;
l &= bank->enabled_non_wakeup_gpios;
/*
* No need to generate IRQs for the rising edge for gpio IRQs
* configured with falling edge only; and vice versa.
*/
gen0 = l & bank->saved_fallingdetect;
gen0 &= bank->saved_datain;
gen1 = l & bank->saved_risingdetect;
gen1 &= ~(bank->saved_datain);
/* FIXME: Consider GPIO IRQs with level detections properly! */
gen = l & (~(bank->saved_fallingdetect) & ~(bank->saved_risingdetect));
/* Consider all GPIO IRQs needed to be updated */
gen |= gen0 | gen1;
if (gen) {
u32 old0, old1;
old0 = __raw_readl(bank->base + bank->regs->leveldetect0);
old1 = __raw_readl(bank->base + bank->regs->leveldetect1);
if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
__raw_writel(old0 | gen, bank->base +
bank->regs->leveldetect0);
__raw_writel(old1 | gen, bank->base +
bank->regs->leveldetect1);
}
if (cpu_is_omap44xx()) {
__raw_writel(old0 | l, bank->base +
bank->regs->leveldetect0);
__raw_writel(old1 | l, bank->base +
bank->regs->leveldetect1);
}
__raw_writel(old0, bank->base + bank->regs->leveldetect0);
__raw_writel(old1, bank->base + bank->regs->leveldetect1);
}
bank->workaround_enabled = false;
spin_unlock_irqrestore(&bank->lock, flags);
return 0;
}
#endif /* CONFIG_PM_RUNTIME */
void omap2_gpio_prepare_for_idle(int pwr_mode)
{
struct gpio_bank *bank;
list_for_each_entry(bank, &omap_gpio_list, node) {
u32 l1 = 0, l2 = 0;
int j;
if (!bank->loses_context)
if (!bank->mod_usage || !bank->loses_context)
continue;
bank->power_mode = pwr_mode;
for (j = 0; j < hweight_long(bank->dbck_enable_mask); j++)
clk_disable(bank->dbck);
if (!off_mode)
continue;
/* If going to OFF, remove triggering for all
* non-wakeup GPIOs. Otherwise spurious IRQs will be
* generated. See OMAP2420 Errata item 1.101. */
if (!(bank->enabled_non_wakeup_gpios))
goto save_gpio_context;
bank->saved_datain = __raw_readl(bank->base +
bank->regs->datain);
l1 = __raw_readl(bank->base + bank->regs->fallingdetect);
l2 = __raw_readl(bank->base + bank->regs->risingdetect);
bank->saved_fallingdetect = l1;
bank->saved_risingdetect = l2;
l1 &= ~bank->enabled_non_wakeup_gpios;
l2 &= ~bank->enabled_non_wakeup_gpios;
__raw_writel(l1, bank->base + bank->regs->fallingdetect);
__raw_writel(l2, bank->base + bank->regs->risingdetect);
save_gpio_context:
if (bank->get_context_loss_count)
bank->context_loss_count =
bank->get_context_loss_count(bank->dev);
omap_gpio_save_context(bank);
if (!pm_runtime_suspended(bank->dev))
pm_runtime_put(bank->dev);
pm_runtime_put_sync_suspend(bank->dev);
}
}
@ -1184,84 +1293,19 @@ void omap2_gpio_resume_after_idle(void)
struct gpio_bank *bank;
list_for_each_entry(bank, &omap_gpio_list, node) {
int context_lost_cnt_after;
u32 l = 0, gen, gen0, gen1;
int j;
if (!bank->loses_context)
if (!bank->mod_usage || !bank->loses_context)
continue;
for (j = 0; j < hweight_long(bank->dbck_enable_mask); j++)
clk_enable(bank->dbck);
if (pm_runtime_suspended(bank->dev))
pm_runtime_get_sync(bank->dev);
if (bank->get_context_loss_count) {
context_lost_cnt_after =
bank->get_context_loss_count(bank->dev);
if (context_lost_cnt_after != bank->context_loss_count
|| !context_lost_cnt_after)
omap_gpio_restore_context(bank);
}
if (!(bank->enabled_non_wakeup_gpios))
continue;
__raw_writel(bank->saved_fallingdetect,
bank->base + bank->regs->fallingdetect);
__raw_writel(bank->saved_risingdetect,
bank->base + bank->regs->risingdetect);
l = __raw_readl(bank->base + bank->regs->datain);
/* Check if any of the non-wakeup interrupt GPIOs have changed
* state. If so, generate an IRQ by software. This is
* horribly racy, but it's the best we can do to work around
* this silicon bug. */
l ^= bank->saved_datain;
l &= bank->enabled_non_wakeup_gpios;
/*
* No need to generate IRQs for the rising edge for gpio IRQs
* configured with falling edge only; and vice versa.
*/
gen0 = l & bank->saved_fallingdetect;
gen0 &= bank->saved_datain;
gen1 = l & bank->saved_risingdetect;
gen1 &= ~(bank->saved_datain);
/* FIXME: Consider GPIO IRQs with level detections properly! */
gen = l & (~(bank->saved_fallingdetect) &
~(bank->saved_risingdetect));
/* Consider all GPIO IRQs needed to be updated */
gen |= gen0 | gen1;
if (gen) {
u32 old0, old1;
old0 = __raw_readl(bank->base +
bank->regs->leveldetect0);
old1 = __raw_readl(bank->base +
bank->regs->leveldetect1);
if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
old0 |= gen;
old1 |= gen;
}
if (cpu_is_omap44xx()) {
old0 |= l;
old1 |= l;
}
__raw_writel(old0, bank->base +
bank->regs->leveldetect0);
__raw_writel(old1, bank->base +
bank->regs->leveldetect1);
}
pm_runtime_get_sync(bank->dev);
}
}
#if defined(CONFIG_PM_RUNTIME)
static void omap_gpio_save_context(struct gpio_bank *bank)
{
bank->context.irqenable1 =
@ -1303,13 +1347,18 @@ static void omap_gpio_restore_context(struct gpio_bank *bank)
bank->base + bank->regs->fallingdetect);
__raw_writel(bank->context.dataout, bank->base + bank->regs->dataout);
}
#endif /* CONFIG_PM_RUNTIME */
#else
#define omap_gpio_suspend NULL
#define omap_gpio_resume NULL
#define omap_gpio_runtime_suspend NULL
#define omap_gpio_runtime_resume NULL
#endif
static const struct dev_pm_ops gpio_pm_ops = {
SET_SYSTEM_SLEEP_PM_OPS(omap_gpio_suspend, omap_gpio_resume)
SET_RUNTIME_PM_OPS(omap_gpio_runtime_suspend, omap_gpio_runtime_resume,
NULL)
};
static struct platform_driver omap_gpio_driver = {