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Merge branch 'x86-apic-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'x86-apic-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: x86, ioapic: Print IR_IO_APIC_route_entry when IR is enabled x86, ioapic: Print IRTE when IR is enabled x86, x2apic: Preserve high 32-bits of IA32_APIC_BASE MSR x86, ioapic: Also print Dest field x86, ioapic: Format clean up for IOAPIC output x86: print APIC data a little later during boot
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commit
2c9e88a108
@ -1430,7 +1430,7 @@ void enable_x2apic(void)
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rdmsr(MSR_IA32_APICBASE, msr, msr2);
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if (!(msr & X2APIC_ENABLE)) {
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printk_once(KERN_INFO "Enabling x2apic\n");
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wrmsr(MSR_IA32_APICBASE, msr | X2APIC_ENABLE, 0);
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wrmsr(MSR_IA32_APICBASE, msr | X2APIC_ENABLE, msr2);
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}
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}
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#endif /* CONFIG_X86_X2APIC */
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@ -1295,6 +1295,16 @@ static int setup_ioapic_entry(int apic_id, int irq,
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* irq handler will do the explicit EOI to the io-apic.
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*/
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ir_entry->vector = pin;
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apic_printk(APIC_VERBOSE, KERN_DEBUG "IOAPIC[%d]: "
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"Set IRTE entry (P:%d FPD:%d Dst_Mode:%d "
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"Redir_hint:%d Trig_Mode:%d Dlvry_Mode:%X "
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"Avail:%X Vector:%02X Dest:%08X "
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"SID:%04X SQ:%X SVT:%X)\n",
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apic_id, irte.present, irte.fpd, irte.dst_mode,
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irte.redir_hint, irte.trigger_mode, irte.dlvry_mode,
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irte.avail, irte.vector, irte.dest_id,
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irte.sid, irte.sq, irte.svt);
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} else {
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entry->delivery_mode = apic->irq_delivery_mode;
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entry->dest_mode = apic->irq_dest_mode;
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@ -1337,9 +1347,9 @@ static void setup_ioapic_irq(int apic_id, int pin, unsigned int irq,
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apic_printk(APIC_VERBOSE,KERN_DEBUG
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"IOAPIC[%d]: Set routing entry (%d-%d -> 0x%x -> "
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"IRQ %d Mode:%i Active:%i)\n",
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"IRQ %d Mode:%i Active:%i Dest:%d)\n",
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apic_id, mpc_ioapic_id(apic_id), pin, cfg->vector,
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irq, trigger, polarity);
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irq, trigger, polarity, dest);
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if (setup_ioapic_entry(mpc_ioapic_id(apic_id), irq, &entry,
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@ -1522,10 +1532,12 @@ __apicdebuginit(void) print_IO_APIC(void)
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printk(KERN_DEBUG "....... : LTS : %X\n", reg_00.bits.LTS);
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printk(KERN_DEBUG ".... register #01: %08X\n", *(int *)®_01);
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printk(KERN_DEBUG "....... : max redirection entries: %04X\n", reg_01.bits.entries);
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printk(KERN_DEBUG "....... : max redirection entries: %02X\n",
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reg_01.bits.entries);
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printk(KERN_DEBUG "....... : PRQ implemented: %X\n", reg_01.bits.PRQ);
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printk(KERN_DEBUG "....... : IO APIC version: %04X\n", reg_01.bits.version);
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printk(KERN_DEBUG "....... : IO APIC version: %02X\n",
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reg_01.bits.version);
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/*
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* Some Intel chipsets with IO APIC VERSION of 0x1? don't have reg_02,
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@ -1550,31 +1562,60 @@ __apicdebuginit(void) print_IO_APIC(void)
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printk(KERN_DEBUG ".... IRQ redirection table:\n");
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printk(KERN_DEBUG " NR Dst Mask Trig IRR Pol"
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" Stat Dmod Deli Vect:\n");
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if (intr_remapping_enabled) {
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printk(KERN_DEBUG " NR Indx Fmt Mask Trig IRR"
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" Pol Stat Indx2 Zero Vect:\n");
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} else {
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printk(KERN_DEBUG " NR Dst Mask Trig IRR Pol"
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" Stat Dmod Deli Vect:\n");
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}
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for (i = 0; i <= reg_01.bits.entries; i++) {
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struct IO_APIC_route_entry entry;
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if (intr_remapping_enabled) {
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struct IO_APIC_route_entry entry;
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struct IR_IO_APIC_route_entry *ir_entry;
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entry = ioapic_read_entry(apic, i);
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entry = ioapic_read_entry(apic, i);
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ir_entry = (struct IR_IO_APIC_route_entry *) &entry;
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printk(KERN_DEBUG " %02x %04X ",
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i,
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ir_entry->index
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);
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printk("%1d %1d %1d %1d %1d "
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"%1d %1d %X %02X\n",
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ir_entry->format,
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ir_entry->mask,
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ir_entry->trigger,
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ir_entry->irr,
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ir_entry->polarity,
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ir_entry->delivery_status,
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ir_entry->index2,
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ir_entry->zero,
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ir_entry->vector
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);
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} else {
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struct IO_APIC_route_entry entry;
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printk(KERN_DEBUG " %02x %03X ",
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i,
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entry.dest
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);
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printk("%1d %1d %1d %1d %1d %1d %1d %02X\n",
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entry.mask,
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entry.trigger,
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entry.irr,
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entry.polarity,
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entry.delivery_status,
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entry.dest_mode,
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entry.delivery_mode,
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entry.vector
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);
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entry = ioapic_read_entry(apic, i);
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printk(KERN_DEBUG " %02x %02X ",
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i,
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entry.dest
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);
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printk("%1d %1d %1d %1d %1d "
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"%1d %1d %02X\n",
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entry.mask,
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entry.trigger,
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entry.irr,
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entry.polarity,
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entry.delivery_status,
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entry.dest_mode,
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entry.delivery_mode,
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entry.vector
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);
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}
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}
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}
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printk(KERN_DEBUG "IRQ to pin mappings:\n");
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for_each_active_irq(irq) {
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struct irq_pin_list *entry;
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@ -1792,7 +1833,7 @@ __apicdebuginit(int) print_ICs(void)
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return 0;
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}
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fs_initcall(print_ICs);
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late_initcall(print_ICs);
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/* Where if anywhere is the i8259 connect in external int mode */
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