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davinci: EDMA: add support for dm646x
Enables module clock for DM646x EDMA channel controller and transfer controller. Signed-off-by: Naresh Medisetty <naresh@ti.com> Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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parent
60902a2cb1
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@ -162,6 +162,41 @@ static struct clk arm_clk = {
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.flags = ALWAYS_ENABLED,
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};
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static struct clk edma_cc_clk = {
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.name = "edma_cc",
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.parent = &pll1_sysclk2,
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.lpsc = DM646X_LPSC_TPCC,
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.flags = ALWAYS_ENABLED,
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};
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static struct clk edma_tc0_clk = {
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.name = "edma_tc0",
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.parent = &pll1_sysclk2,
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.lpsc = DM646X_LPSC_TPTC0,
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.flags = ALWAYS_ENABLED,
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};
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static struct clk edma_tc1_clk = {
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.name = "edma_tc1",
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.parent = &pll1_sysclk2,
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.lpsc = DM646X_LPSC_TPTC1,
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.flags = ALWAYS_ENABLED,
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};
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static struct clk edma_tc2_clk = {
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.name = "edma_tc2",
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.parent = &pll1_sysclk2,
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.lpsc = DM646X_LPSC_TPTC2,
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.flags = ALWAYS_ENABLED,
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};
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static struct clk edma_tc3_clk = {
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.name = "edma_tc3",
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.parent = &pll1_sysclk2,
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.lpsc = DM646X_LPSC_TPTC3,
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.flags = ALWAYS_ENABLED,
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};
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static struct clk uart0_clk = {
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.name = "uart0",
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.parent = &aux_clkin,
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@ -269,6 +304,11 @@ struct davinci_clk dm646x_clks[] = {
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CLK(NULL, "pll2_sysclk1", &pll2_sysclk1),
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CLK(NULL, "dsp", &dsp_clk),
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CLK(NULL, "arm", &arm_clk),
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CLK(NULL, "edma_cc", &edma_cc_clk),
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CLK(NULL, "edma_tc0", &edma_tc0_clk),
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CLK(NULL, "edma_tc1", &edma_tc1_clk),
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CLK(NULL, "edma_tc2", &edma_tc2_clk),
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CLK(NULL, "edma_tc3", &edma_tc3_clk),
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CLK(NULL, "uart0", &uart0_clk),
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CLK(NULL, "uart1", &uart1_clk),
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CLK(NULL, "uart2", &uart2_clk),
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