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PCI: vmd: Add offset to bus numbers if necessary
Depending on platform configuration, certain VMD devices may have an additional configuration option which specifies the range of bus numbers allowed in a VMD PCIe domain. We determine this requirement by checking the value of two vendor specific config registers in the VMD endpoint: VMCAP[0] | VMCONFIG[9:8] | Bus Numbers ---------------------------------------- 0 | * | 0-255 1 | 00 | 0-127 1 | 01 | 128-255 1 | 10 | 0-255 This feature is also added as a bit in driver_data, to allow future conforming device ids which support these features to be enabled through sysfs new_id. Signed-off-by: Jon Derrick <jonathan.derrick@intel.com> [lorenzo.pieralisi@arm.com: updated commit subject] Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
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@ -24,6 +24,10 @@
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#define VMD_MEMBAR1 2
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#define VMD_MEMBAR2 4
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#define PCI_REG_VMCAP 0x40
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#define BUS_RESTRICT_CAP(vmcap) (vmcap & 0x1)
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#define PCI_REG_VMCONFIG 0x44
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#define BUS_RESTRICT_CFG(vmcfg) ((vmcfg >> 8) & 0x3)
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#define PCI_REG_VMLOCK 0x70
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#define MB2_SHADOW_EN(vmlock) (vmlock & 0x2)
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@ -34,6 +38,12 @@ enum vmd_features {
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* resource assignment to enable guest virtualization
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*/
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VMD_FEAT_HAS_MEMBAR_SHADOW = (1 << 0),
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/*
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* Device may provide root port configuration information which limits
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* bus numbering
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*/
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VMD_FEAT_HAS_BUS_RESTRICTIONS = (1 << 1),
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};
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/*
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@ -567,7 +577,7 @@ static int vmd_enable_domain(struct vmd_dev *vmd, unsigned long features)
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unsigned long flags;
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LIST_HEAD(resources);
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resource_size_t offset[2] = {0};
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resource_size_t membar2_offset = 0x2000;
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resource_size_t membar2_offset = 0x2000, busn_start = 0;
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/*
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* Shadow registers may exist in certain VMD device ids which allow
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@ -598,11 +608,25 @@ static int vmd_enable_domain(struct vmd_dev *vmd, unsigned long features)
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}
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}
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/*
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* Certain VMD devices may have a root port configuration option which
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* limits the bus range to between 0-127 or 128-255
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*/
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if (features & VMD_FEAT_HAS_BUS_RESTRICTIONS) {
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u32 vmcap, vmconfig;
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pci_read_config_dword(vmd->dev, PCI_REG_VMCAP, &vmcap);
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pci_read_config_dword(vmd->dev, PCI_REG_VMCONFIG, &vmconfig);
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if (BUS_RESTRICT_CAP(vmcap) &&
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(BUS_RESTRICT_CFG(vmconfig) == 0x1))
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busn_start = 128;
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}
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res = &vmd->dev->resource[VMD_CFGBAR];
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vmd->resources[0] = (struct resource) {
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.name = "VMD CFGBAR",
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.start = 0,
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.end = (resource_size(res) >> 20) - 1,
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.start = busn_start,
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.end = busn_start + (resource_size(res) >> 20) - 1,
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.flags = IORESOURCE_BUS | IORESOURCE_PCI_FIXED,
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};
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@ -670,8 +694,8 @@ static int vmd_enable_domain(struct vmd_dev *vmd, unsigned long features)
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pci_add_resource_offset(&resources, &vmd->resources[1], offset[0]);
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pci_add_resource_offset(&resources, &vmd->resources[2], offset[1]);
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vmd->bus = pci_create_root_bus(&vmd->dev->dev, 0, &vmd_ops, sd,
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&resources);
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vmd->bus = pci_create_root_bus(&vmd->dev->dev, busn_start, &vmd_ops,
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sd, &resources);
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if (!vmd->bus) {
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pci_free_resource_list(&resources);
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irq_domain_remove(vmd->irq_domain);
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