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pinctrl: denverton: Provide Interrupt Status register offset

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Since some of the GPIO controllers use different Interrupt Status offset,
it make sense to provide it explicitly in the driver.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
This commit is contained in:
Andy Shevchenko 2019-07-23 18:56:31 +03:00
parent f702e0b93c
commit 2a2ed47521
1 changed files with 3 additions and 1 deletions
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4
drivers/pinctrl/intel/pinctrl-denverton.c
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@ -15,8 +15,9 @@
#include "pinctrl-intel.h"
#define DNV_PAD_OWN 0x020
#define DNV_HOSTSW_OWN 0x0C0
#define DNV_PADCFGLOCK 0x090
#define DNV_HOSTSW_OWN 0x0C0
#define DNV_GPI_IS 0x100
#define DNV_GPI_IE 0x120
#define DNV_GPP(n, s, e) \
@ -32,6 +33,7 @@
.padown_offset = DNV_PAD_OWN, \
.padcfglock_offset = DNV_PADCFGLOCK, \
.hostown_offset = DNV_HOSTSW_OWN, \
.is_offset = DNV_GPI_IS, \
.ie_offset = DNV_GPI_IE, \
.pin_base = (s), \
.npins = ((e) - (s) + 1), \