arm64: dts: imx8mp: Add audio XCVR device node

XCVR (Audio Transceiver) is a on-chip functional module found
on i.MX8MP. It supports HDMI2.1 eARC, HDMI1.4 ARC and SPDIF.

The reset controller is provided by the audio block control driver.

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Shengjiu Wang 2024-06-27 17:53:00 +08:00 committed by Shawn Guo
parent a38d101e46
commit 29c4d4c54c

View File

@ -1541,6 +1541,31 @@
dma-names = "tx";
status = "disabled";
};
xcvr: xcvr@30cc0000 {
compatible = "fsl,imx8mp-xcvr";
reg = <0x30cc0000 0x800>,
<0x30cc0800 0x400>,
<0x30cc0c00 0x080>,
<0x30cc0e00 0x080>;
reg-names = "ram", "regs", "rxfifo",
"txfifo";
interrupts = /* XCVR IRQ 0 */
<GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
/* XCVR IRQ 1 */
<GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
/* XCVR PHY - SPDIF wakeup IRQ */
<GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_EARC_IPG>,
<&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_EARC_PHY>,
<&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SPBA2_ROOT>,
<&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_AUDPLL_ROOT>;
clock-names = "ipg", "phy", "spba", "pll_ipg";
dmas = <&sdma2 30 2 0>, <&sdma2 31 2 0>;
dma-names = "rx", "tx";
resets = <&audio_blk_ctrl 0>;
status = "disabled";
};
};
sdma3: dma-controller@30e00000 {
@ -1569,6 +1594,7 @@
compatible = "fsl,imx8mp-audio-blk-ctrl";
reg = <0x30e20000 0x10000>;
#clock-cells = <1>;
#reset-cells = <1>;
clocks = <&clk IMX8MP_CLK_AUDIO_ROOT>,
<&clk IMX8MP_CLK_SAI1>,
<&clk IMX8MP_CLK_SAI2>,