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arm64: dts: imx8mp: Add audio XCVR device node
XCVR (Audio Transceiver) is a on-chip functional module found on i.MX8MP. It supports HDMI2.1 eARC, HDMI1.4 ARC and SPDIF. The reset controller is provided by the audio block control driver. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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@ -1541,6 +1541,31 @@
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dma-names = "tx";
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status = "disabled";
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};
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xcvr: xcvr@30cc0000 {
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compatible = "fsl,imx8mp-xcvr";
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reg = <0x30cc0000 0x800>,
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<0x30cc0800 0x400>,
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<0x30cc0c00 0x080>,
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<0x30cc0e00 0x080>;
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reg-names = "ram", "regs", "rxfifo",
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"txfifo";
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interrupts = /* XCVR IRQ 0 */
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<GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
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/* XCVR IRQ 1 */
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<GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
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/* XCVR PHY - SPDIF wakeup IRQ */
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<GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_EARC_IPG>,
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<&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_EARC_PHY>,
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<&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SPBA2_ROOT>,
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<&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_AUDPLL_ROOT>;
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clock-names = "ipg", "phy", "spba", "pll_ipg";
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dmas = <&sdma2 30 2 0>, <&sdma2 31 2 0>;
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dma-names = "rx", "tx";
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resets = <&audio_blk_ctrl 0>;
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status = "disabled";
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};
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};
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sdma3: dma-controller@30e00000 {
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@ -1569,6 +1594,7 @@
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compatible = "fsl,imx8mp-audio-blk-ctrl";
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reg = <0x30e20000 0x10000>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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clocks = <&clk IMX8MP_CLK_AUDIO_ROOT>,
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<&clk IMX8MP_CLK_SAI1>,
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<&clk IMX8MP_CLK_SAI2>,
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