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ARM: shmobile: sh73a0 dtsi: Add memory-controller nodes

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Add device nodes for the two SDRAM Bus State Controllers.
The SBSCs are located in the A4BC0 resp. A4BC1 PM domains, which must
not be powered down, else the system will crash.

References to the A4BC0 and A4BC1 PM domains will be added later.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This commit is contained in:
Geert Uytterhoeven 2015-01-14 12:13:02 +01:00 committed by Simon Horman
parent f4c6d004ea
commit 29828c8756
1 changed files with 16 additions and 0 deletions
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16
arch/arm/boot/dts/sh73a0.dtsi
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@ -42,6 +42,22 @@
<0xf0000100 0x100>;
};
sbsc2: memory-controller@fb400000 {
compatible = "renesas,sbsc-sh73a0";
reg = <0xfb400000 0x400>;
interrupts = <0 37 IRQ_TYPE_LEVEL_HIGH>,
<0 38 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "sec", "temp";
};
sbsc1: memory-controller@fe400000 {
compatible = "renesas,sbsc-sh73a0";
reg = <0xfe400000 0x400>;
interrupts = <0 35 IRQ_TYPE_LEVEL_HIGH>,
<0 36 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "sec", "temp";
};
pmu {
compatible = "arm,cortex-a9-pmu";
interrupts = <0 55 IRQ_TYPE_LEVEL_HIGH>,