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arm64: dts: juno: Add idle-states to device tree
This patch adds idle-states bindings data collected through a set of benchmarking experiments (latency and energy consumption) on Juno boards. Latencies data represents the worst case scenarios as required by the DT idle-states bindings. Signed-off-by: Jon Medhurst <tixy@linaro.org> Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Olof Johansson <olof@lixom.net>
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@ -60,6 +60,28 @@
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idle-states {
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entry-method = "arm,psci";
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CPU_SLEEP_0: cpu-sleep-0 {
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compatible = "arm,idle-state";
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arm,psci-suspend-param = <0x0010000>;
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local-timer-stop;
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entry-latency-us = <300>;
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exit-latency-us = <1200>;
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min-residency-us = <2000>;
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};
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CLUSTER_SLEEP_0: cluster-sleep-0 {
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compatible = "arm,idle-state";
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arm,psci-suspend-param = <0x1010000>;
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local-timer-stop;
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entry-latency-us = <300>;
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exit-latency-us = <1200>;
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min-residency-us = <2500>;
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};
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};
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A57_0: cpu@0 {
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compatible = "arm,cortex-a57","arm,armv8";
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reg = <0x0 0x0>;
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@ -67,6 +89,7 @@
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enable-method = "psci";
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next-level-cache = <&A57_L2>;
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clocks = <&scpi_dvfs 0>;
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cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
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};
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A57_1: cpu@1 {
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@ -76,6 +99,7 @@
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enable-method = "psci";
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next-level-cache = <&A57_L2>;
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clocks = <&scpi_dvfs 0>;
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cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
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};
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A53_0: cpu@100 {
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@ -85,6 +109,7 @@
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enable-method = "psci";
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next-level-cache = <&A53_L2>;
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clocks = <&scpi_dvfs 1>;
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cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
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};
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A53_1: cpu@101 {
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@ -94,6 +119,7 @@
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enable-method = "psci";
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next-level-cache = <&A53_L2>;
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clocks = <&scpi_dvfs 1>;
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cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
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};
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A53_2: cpu@102 {
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@ -103,6 +129,7 @@
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enable-method = "psci";
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next-level-cache = <&A53_L2>;
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clocks = <&scpi_dvfs 1>;
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cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
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};
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A53_3: cpu@103 {
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@ -112,6 +139,7 @@
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enable-method = "psci";
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next-level-cache = <&A53_L2>;
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clocks = <&scpi_dvfs 1>;
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cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
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};
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A57_L2: l2-cache0 {
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@ -60,6 +60,28 @@
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};
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};
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idle-states {
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entry-method = "arm,psci";
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CPU_SLEEP_0: cpu-sleep-0 {
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compatible = "arm,idle-state";
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arm,psci-suspend-param = <0x0010000>;
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local-timer-stop;
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entry-latency-us = <300>;
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exit-latency-us = <1200>;
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min-residency-us = <2000>;
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};
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CLUSTER_SLEEP_0: cluster-sleep-0 {
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compatible = "arm,idle-state";
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arm,psci-suspend-param = <0x1010000>;
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local-timer-stop;
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entry-latency-us = <300>;
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exit-latency-us = <1200>;
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min-residency-us = <2500>;
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};
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};
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A57_0: cpu@0 {
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compatible = "arm,cortex-a57","arm,armv8";
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reg = <0x0 0x0>;
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@ -67,6 +89,7 @@
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enable-method = "psci";
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next-level-cache = <&A57_L2>;
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clocks = <&scpi_dvfs 0>;
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cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
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};
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A57_1: cpu@1 {
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@ -76,6 +99,7 @@
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enable-method = "psci";
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next-level-cache = <&A57_L2>;
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clocks = <&scpi_dvfs 0>;
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cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
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};
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A53_0: cpu@100 {
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@ -85,6 +109,7 @@
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enable-method = "psci";
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next-level-cache = <&A53_L2>;
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clocks = <&scpi_dvfs 1>;
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cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
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};
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A53_1: cpu@101 {
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@ -94,6 +119,7 @@
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enable-method = "psci";
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next-level-cache = <&A53_L2>;
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clocks = <&scpi_dvfs 1>;
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cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
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};
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A53_2: cpu@102 {
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@ -103,6 +129,7 @@
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enable-method = "psci";
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next-level-cache = <&A53_L2>;
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clocks = <&scpi_dvfs 1>;
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cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
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};
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A53_3: cpu@103 {
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@ -112,6 +139,7 @@
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enable-method = "psci";
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next-level-cache = <&A53_L2>;
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clocks = <&scpi_dvfs 1>;
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cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
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};
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A57_L2: l2-cache0 {
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