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soc: rockchip: io-domain: add rk3568 support

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The io-domain registers on RK3568 SoCs have three separated bits to
enable/disable the 1.8v/2.5v/3.3v power.

This patch make the write to be a operation, allow rk3568 uses a private
register set function.

Since the 2.5v mode hasn't been fully validated yet, the driver only sets
1.8v [enable] + 3.3v [disable] for 1.8v mode
1.8v [disable] + 3.3v [enable] for 3.3v mode

There is not register order requirement which has been cleared by our IC
team.

For future reference the full usage matrix including the 2.5V setting is:
case  V33  V25  V18  result
0     0    0    0    IO safe, but cannot work
1     0    0    1    IO require 1.8V, should < 1.98V, otherwise IO may damage
2     0    1    0    IO require 2.5V, should < 2.75V, otherwise IO may damage
3     0    1    1    Invalid state, should avoid
4     1    0    0    IO require 3.3V, should < 3.63V, otherwise IO may damage
5     1    0    1    IO require 1.8V, should < 1.98V, otherwise IO may damage
6     1    1    0    IO require 2.5V, should < 2.75V, otherwise IO may damage
7     1    1    1    Invalid state, should avoid

Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Tested-by: Peter Geis <pgwipeout@gmail.com>
[added mode clarification from Jay]
Link: https://lore.kernel.org/r/20210805120107.27007-3-michael.riesch@wolfvision.net
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This commit is contained in:
Jianqun Xu 2021-08-05 14:01:02 +02:00 committed by Heiko Stuebner
parent fadbd4e784
commit 28b05a64e4
1 changed files with 80 additions and 8 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

88
drivers/soc/rockchip/io-domain.c
View File

@ -51,13 +51,11 @@
#define RK3399_PMUGRF_CON0_VSEL BIT(8)
#define RK3399_PMUGRF_VSEL_SUPPLY_NUM 9
struct rockchip_iodomain;
#define RK3568_PMU_GRF_IO_VSEL0 (0x0140)
#define RK3568_PMU_GRF_IO_VSEL1 (0x0144)
#define RK3568_PMU_GRF_IO_VSEL2 (0x0148)
struct rockchip_iodomain_soc_data {
int grf_offset;
const char *supply_names[MAX_SUPPLIES];
void (*init)(struct rockchip_iodomain *iod);
};
struct rockchip_iodomain;
struct rockchip_iodomain_supply {
struct rockchip_iodomain *iod;
@ -66,13 +64,62 @@ struct rockchip_iodomain_supply {
int idx;
};
struct rockchip_iodomain_soc_data {
int grf_offset;
const char *supply_names[MAX_SUPPLIES];
void (*init)(struct rockchip_iodomain *iod);
int (*write)(struct rockchip_iodomain_supply *supply, int uV);
};
struct rockchip_iodomain {
struct device *dev;
struct regmap *grf;
const struct rockchip_iodomain_soc_data *soc_data;
struct rockchip_iodomain_supply supplies[MAX_SUPPLIES];
int (*write)(struct rockchip_iodomain_supply *supply, int uV);
};
static int rk3568_iodomain_write(struct rockchip_iodomain_supply *supply, int uV)
{
struct rockchip_iodomain *iod = supply->iod;
u32 is_3v3 = uV > MAX_VOLTAGE_1_8;
u32 val0, val1;
int b;
switch (supply->idx) {
case 0: /* pmuio1 */
break;
case 1: /* pmuio2 */
b = supply->idx;
val0 = BIT(16 + b) | (is_3v3 ? 0 : BIT(b));
b = supply->idx + 4;
val1 = BIT(16 + b) | (is_3v3 ? BIT(b) : 0);
regmap_write(iod->grf, RK3568_PMU_GRF_IO_VSEL2, val0);
regmap_write(iod->grf, RK3568_PMU_GRF_IO_VSEL2, val1);
break;
case 3: /* vccio2 */
break;
case 2: /* vccio1 */
case 4: /* vccio3 */
case 5: /* vccio4 */
case 6: /* vccio5 */
case 7: /* vccio6 */
case 8: /* vccio7 */
b = supply->idx - 1;
val0 = BIT(16 + b) | (is_3v3 ? 0 : BIT(b));
val1 = BIT(16 + b) | (is_3v3 ? BIT(b) : 0);
regmap_write(iod->grf, RK3568_PMU_GRF_IO_VSEL0, val0);
regmap_write(iod->grf, RK3568_PMU_GRF_IO_VSEL1, val1);
break;
default:
return -EINVAL;
};
return 0;
}
static int rockchip_iodomain_write(struct rockchip_iodomain_supply *supply,
int uV)
{
@ -136,7 +183,7 @@ static int rockchip_iodomain_notify(struct notifier_block *nb,
return NOTIFY_BAD;
}
ret = rockchip_iodomain_write(supply, uV);
ret = supply->iod->write(supply, uV);
if (ret && event == REGULATOR_EVENT_PRE_VOLTAGE_CHANGE)
return NOTIFY_BAD;
@ -398,6 +445,22 @@ static const struct rockchip_iodomain_soc_data soc_data_rk3399_pmu = {
.init = rk3399_pmu_iodomain_init,
};
static const struct rockchip_iodomain_soc_data soc_data_rk3568_pmu = {
.grf_offset = 0x140,
.supply_names = {
"pmuio1",
"pmuio2",
"vccio1",
"vccio2",
"vccio3",
"vccio4",
"vccio5",
"vccio6",
"vccio7",
},
.write = rk3568_iodomain_write,
};
static const struct rockchip_iodomain_soc_data soc_data_rv1108 = {
.grf_offset = 0x404,
.supply_names = {
@ -469,6 +532,10 @@ static const struct of_device_id rockchip_iodomain_match[] = {
.compatible = "rockchip,rk3399-pmu-io-voltage-domain",
.data = &soc_data_rk3399_pmu
},
{
.compatible = "rockchip,rk3568-pmu-io-voltage-domain",
.data = &soc_data_rk3568_pmu
},
{
.compatible = "rockchip,rv1108-io-voltage-domain",
.data = &soc_data_rv1108
@ -502,6 +569,11 @@ static int rockchip_iodomain_probe(struct platform_device *pdev)
match = of_match_node(rockchip_iodomain_match, np);
iod->soc_data = match->data;
if (iod->soc_data->write)
iod->write = iod->soc_data->write;
else
iod->write = rockchip_iodomain_write;
parent = pdev->dev.parent;
if (parent && parent->of_node) {
iod->grf = syscon_node_to_regmap(parent->of_node);
@ -562,7 +634,7 @@ static int rockchip_iodomain_probe(struct platform_device *pdev)
supply->reg = reg;
supply->nb.notifier_call = rockchip_iodomain_notify;
ret = rockchip_iodomain_write(supply, uV);
ret = iod->write(supply, uV);
if (ret) {
supply->reg = NULL;
goto unreg_notify;