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ixgbe: add support for new format of PBA numbers
The new PBA format is stored as a string. This patch allows the driver to support both the old and new format. Signed-off-by: Don Skidmore <donald.c.skidmore@intel.com> Tested-by: Stephen Ko <stephen.s.ko@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -196,30 +196,110 @@ s32 ixgbe_clear_hw_cntrs_generic(struct ixgbe_hw *hw)
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}
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/**
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* ixgbe_read_pba_num_generic - Reads part number from EEPROM
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* ixgbe_read_pba_string_generic - Reads part number string from EEPROM
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* @hw: pointer to hardware structure
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* @pba_num: stores the part number from the EEPROM
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* @pba_num: stores the part number string from the EEPROM
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* @pba_num_size: part number string buffer length
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*
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* Reads the part number from the EEPROM.
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* Reads the part number string from the EEPROM.
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**/
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s32 ixgbe_read_pba_num_generic(struct ixgbe_hw *hw, u32 *pba_num)
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s32 ixgbe_read_pba_string_generic(struct ixgbe_hw *hw, u8 *pba_num,
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u32 pba_num_size)
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{
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s32 ret_val;
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u16 data;
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u16 pba_ptr;
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u16 offset;
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u16 length;
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if (pba_num == NULL) {
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hw_dbg(hw, "PBA string buffer was null\n");
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return IXGBE_ERR_INVALID_ARGUMENT;
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}
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ret_val = hw->eeprom.ops.read(hw, IXGBE_PBANUM0_PTR, &data);
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if (ret_val) {
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hw_dbg(hw, "NVM Read Error\n");
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return ret_val;
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}
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*pba_num = (u32)(data << 16);
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ret_val = hw->eeprom.ops.read(hw, IXGBE_PBANUM1_PTR, &data);
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ret_val = hw->eeprom.ops.read(hw, IXGBE_PBANUM1_PTR, &pba_ptr);
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if (ret_val) {
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hw_dbg(hw, "NVM Read Error\n");
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return ret_val;
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}
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*pba_num |= data;
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/*
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* if data is not ptr guard the PBA must be in legacy format which
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* means pba_ptr is actually our second data word for the PBA number
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* and we can decode it into an ascii string
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*/
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if (data != IXGBE_PBANUM_PTR_GUARD) {
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hw_dbg(hw, "NVM PBA number is not stored as string\n");
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/* we will need 11 characters to store the PBA */
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if (pba_num_size < 11) {
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hw_dbg(hw, "PBA string buffer too small\n");
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return IXGBE_ERR_NO_SPACE;
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}
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/* extract hex string from data and pba_ptr */
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pba_num[0] = (data >> 12) & 0xF;
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pba_num[1] = (data >> 8) & 0xF;
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pba_num[2] = (data >> 4) & 0xF;
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pba_num[3] = data & 0xF;
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pba_num[4] = (pba_ptr >> 12) & 0xF;
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pba_num[5] = (pba_ptr >> 8) & 0xF;
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pba_num[6] = '-';
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pba_num[7] = 0;
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pba_num[8] = (pba_ptr >> 4) & 0xF;
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pba_num[9] = pba_ptr & 0xF;
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/* put a null character on the end of our string */
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pba_num[10] = '\0';
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/* switch all the data but the '-' to hex char */
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for (offset = 0; offset < 10; offset++) {
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if (pba_num[offset] < 0xA)
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pba_num[offset] += '0';
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else if (pba_num[offset] < 0x10)
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pba_num[offset] += 'A' - 0xA;
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}
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return 0;
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}
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ret_val = hw->eeprom.ops.read(hw, pba_ptr, &length);
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if (ret_val) {
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hw_dbg(hw, "NVM Read Error\n");
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return ret_val;
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}
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if (length == 0xFFFF || length == 0) {
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hw_dbg(hw, "NVM PBA number section invalid length\n");
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return IXGBE_ERR_PBA_SECTION;
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}
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/* check if pba_num buffer is big enough */
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if (pba_num_size < (((u32)length * 2) - 1)) {
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hw_dbg(hw, "PBA string buffer too small\n");
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return IXGBE_ERR_NO_SPACE;
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}
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/* trim pba length from start of string */
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pba_ptr++;
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length--;
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for (offset = 0; offset < length; offset++) {
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ret_val = hw->eeprom.ops.read(hw, pba_ptr + offset, &data);
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if (ret_val) {
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hw_dbg(hw, "NVM Read Error\n");
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return ret_val;
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}
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pba_num[offset * 2] = (u8)(data >> 8);
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pba_num[(offset * 2) + 1] = (u8)(data & 0xFF);
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}
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pba_num[offset * 2] = '\0';
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return 0;
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}
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@ -35,7 +35,8 @@ s32 ixgbe_init_ops_generic(struct ixgbe_hw *hw);
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s32 ixgbe_init_hw_generic(struct ixgbe_hw *hw);
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s32 ixgbe_start_hw_generic(struct ixgbe_hw *hw);
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s32 ixgbe_clear_hw_cntrs_generic(struct ixgbe_hw *hw);
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s32 ixgbe_read_pba_num_generic(struct ixgbe_hw *hw, u32 *pba_num);
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s32 ixgbe_read_pba_string_generic(struct ixgbe_hw *hw, u8 *pba_num,
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u32 pba_num_size);
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s32 ixgbe_get_mac_addr_generic(struct ixgbe_hw *hw, u8 *mac_addr);
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s32 ixgbe_get_bus_info_generic(struct ixgbe_hw *hw);
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void ixgbe_set_lan_id_multi_port_pcie(struct ixgbe_hw *hw);
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@ -6952,11 +6952,12 @@ static int __devinit ixgbe_probe(struct pci_dev *pdev,
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const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
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static int cards_found;
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int i, err, pci_using_dac;
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u8 part_str[IXGBE_PBANUM_LENGTH];
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unsigned int indices = num_possible_cpus();
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#ifdef IXGBE_FCOE
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u16 device_caps;
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#endif
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u32 part_num, eec;
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u32 eec;
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/* Catch broken hardware that put the wrong VF device ID in
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* the PCIe SR-IOV capability.
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@ -7262,16 +7263,17 @@ static int __devinit ixgbe_probe(struct pci_dev *pdev,
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hw->bus.width == ixgbe_bus_width_pcie_x1 ? "Width x1" :
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"Unknown"),
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netdev->dev_addr);
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ixgbe_read_pba_num_generic(hw, &part_num);
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err = ixgbe_read_pba_string_generic(hw, part_str, IXGBE_PBANUM_LENGTH);
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if (err)
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strcpy(part_str, "Unknown");
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if (ixgbe_is_sfp(hw) && hw->phy.sfp_type != ixgbe_sfp_type_not_present)
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e_dev_info("MAC: %d, PHY: %d, SFP+: %d, "
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"PBA No: %06x-%03x\n",
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e_dev_info("MAC: %d, PHY: %d, SFP+: %d, PBA No: %s\n",
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hw->mac.type, hw->phy.type, hw->phy.sfp_type,
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(part_num >> 8), (part_num & 0xff));
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part_str);
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else
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e_dev_info("MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
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hw->mac.type, hw->phy.type,
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(part_num >> 8), (part_num & 0xff));
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e_dev_info("MAC: %d, PHY: %d, PBA No: %s\n",
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hw->mac.type, hw->phy.type, part_str);
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if (hw->bus.width <= ixgbe_bus_width_pcie_x4) {
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e_dev_warn("PCI-Express bandwidth available for this card is "
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@ -1508,7 +1508,11 @@
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#define IXGBE_EEPROM_WORD_SIZE_SHIFT 6
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#define IXGBE_EEPROM_OPCODE_BITS 8
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/* Part Number String Length */
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#define IXGBE_PBANUM_LENGTH 11
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/* Checksum and EEPROM pointers */
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#define IXGBE_PBANUM_PTR_GUARD 0xFAFA
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#define IXGBE_EEPROM_CHECKSUM 0x3F
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#define IXGBE_EEPROM_SUM 0xBABA
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#define IXGBE_PCIE_ANALOG_PTR 0x03
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@ -2637,6 +2641,8 @@ struct ixgbe_info {
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#define IXGBE_ERR_NO_SPACE -25
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#define IXGBE_ERR_OVERTEMP -26
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#define IXGBE_ERR_RAR_INDEX -27
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#define IXGBE_ERR_PBA_SECTION -31
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#define IXGBE_ERR_INVALID_ARGUMENT -32
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#define IXGBE_NOT_IMPLEMENTED 0x7FFFFFFF
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#endif /* _IXGBE_TYPE_H_ */
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