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arm64: dts: rockchip: add wolfvision pf5 io expander board
Add device tree overlay for the WolfVision PF5 IO Expander board. This extension board can be attached to the WolfVision PF5 mainboard and features - TI DP83826 Ethernet PHY - RJ45 jack - USB-A host port Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net> Link: https://lore.kernel.org/r/20240325-feature-wolfvision-pf5-v1-4-5725445f792a@wolfvision.net Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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@ -108,6 +108,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-radxa-e25.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-roc-pc.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-rock-3a.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-wolfvision-pf5.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-wolfvision-pf5-io-expander.dtbo
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-coolpi-cm5-evb.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-edgeble-neu6a-io.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-edgeble-neu6a-wifi.dtbo
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@ -0,0 +1,137 @@
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// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
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/*
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* Device tree overlay for the WolfVision PF5 IO Expander board.
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*
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* Copyright (C) 2024 WolfVision GmbH.
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*/
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/dts-v1/;
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/plugin/;
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#include <dt-bindings/clock/rk3568-cru.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/pinctrl/rockchip.h>
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&{/} {
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gmac0_clkin: external-gmac0-clock {
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compatible = "fixed-clock";
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clock-frequency = <50000000>;
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clock-output-names = "gmac0_clkin";
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#clock-cells = <0>;
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};
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usb_host_vbus: usb-host-vbus-regulator {
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compatible = "regulator-fixed";
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enable-active-high;
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gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&usb_host_vbus_en>;
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regulator-name = "usb_host_vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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vin-supply = <&vcc5v_in>;
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};
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vcc1v8_eth: vcc1v8-eth-regulator {
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compatible = "regulator-fixed";
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enable-active-high;
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gpio = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&vcc1v8_eth_en>;
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regulator-always-on;
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regulator-boot-on;
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regulator-name = "1v8_eth";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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vin-supply = <&vcc3v3_sys>;
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};
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vcc3v3_eth: vcc3v3-eth-regulator {
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compatible = "regulator-fixed";
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enable-active-low;
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gpio = <&gpio0 RK_PC0 GPIO_ACTIVE_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&vcc3v3_eth_enn>;
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regulator-always-on;
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regulator-boot-on;
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regulator-name = "3v3_eth";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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vin-supply = <&vcc3v3_sys>;
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};
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};
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&gmac0 {
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assigned-clocks = <&cru SCLK_GMAC0_RX_TX>,
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<&cru SCLK_GMAC0>;
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assigned-clock-parents = <&cru SCLK_GMAC0_RMII_SPEED>,
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<&gmac0_clkin>;
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clock_in_out = "input";
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phy-handle = <&dp83826>;
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phy-mode = "rmii";
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phy-supply = <&vcc3v3_eth>;
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pinctrl-names = "default";
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pinctrl-0 = <&gmac0_miim
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&gmac0_clkinout
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&gmac0_rx_er
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&gmac0_rx_bus2
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&gmac0_tx_bus2>;
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status = "okay";
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};
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&mdio0 {
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#address-cells = <1>;
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#size-cells = <0>;
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dp83826: ethernet-phy@0 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <0x0>;
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interrupt-parent = <&gpio0>;
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interrupts = <RK_PD3 IRQ_TYPE_EDGE_FALLING>;
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pinctrl-names = "default";
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pinctrl-0 = <ð_wake_intn ð_phy_rstn>;
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reset-assert-us = <1000>;
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reset-deassert-us = <2000>;
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reset-gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_LOW>;
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wakeup-source;
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};
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};
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&pinctrl {
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ethernet {
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eth_wake_intn: eth-wake-intn-pinctrl {
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rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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eth_phy_rstn: eth-phy-rstn-pinctrl {
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rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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vcc1v8_eth_en: vcc1v8-eth-en-pinctrl {
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rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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vcc3v3_eth_enn: vcc3v3-eth-enn-pinctrl {
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rockchip,pins = <0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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usb {
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usb_host_vbus_en: usb-host-vbus-en-pinctrl {
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rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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};
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&usb_host1_xhci {
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maximum-speed = "high-speed";
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phys = <&usb2phy0_host>;
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phy-names = "usb2-phy";
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status = "okay";
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};
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&usb2phy0_host {
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phy-supply = <&usb_host_vbus>;
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status = "okay";
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};
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