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soc/tegra: Register SoC device
Move this code from arch/arm/mach-tegra and make it common among 32-bit and 64-bit Tegra SoCs. This is slightly complicated by the fact that on 32-bit Tegra, the SoC device is used as the parent for all devices that are instantiated from device tree. Signed-off-by: Thierry Reding <treding@nvidia.com>
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@ -84,35 +84,8 @@ static void __init tegra_dt_init_irq(void)
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static void __init tegra_dt_init(void)
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{
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struct soc_device_attribute *soc_dev_attr;
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struct soc_device *soc_dev;
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struct device *parent = NULL;
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struct device *parent = tegra_soc_device_register();
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soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
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if (!soc_dev_attr)
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goto out;
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soc_dev_attr->family = kasprintf(GFP_KERNEL, "Tegra");
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soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%d",
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tegra_sku_info.revision);
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soc_dev_attr->soc_id = kasprintf(GFP_KERNEL, "%u", tegra_get_chip_id());
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soc_dev = soc_device_register(soc_dev_attr);
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if (IS_ERR(soc_dev)) {
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kfree(soc_dev_attr->family);
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kfree(soc_dev_attr->revision);
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kfree(soc_dev_attr->soc_id);
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kfree(soc_dev_attr);
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goto out;
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}
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parent = soc_device_to_device(soc_dev);
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/*
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* Finished with the static registrations now; fill in the missing
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* devices
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*/
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out:
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of_platform_default_populate(NULL, NULL, parent);
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}
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@ -107,6 +107,11 @@ config ARCH_TEGRA_186_SOC
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endif
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endif
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config SOC_TEGRA_FUSE
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def_bool y
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depends on ARCH_TEGRA
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select SOC_BUS
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config SOC_TEGRA_FLOWCTRL
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bool
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@ -19,10 +19,12 @@
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#include <linux/device.h>
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#include <linux/kobject.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/io.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/io.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include <linux/sys_soc.h>
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#include <soc/tegra/common.h>
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#include <soc/tegra/fuse.h>
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@ -210,6 +212,31 @@ static void tegra_enable_fuse_clk(void __iomem *base)
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writel(reg, base + 0x14);
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}
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struct device * __init tegra_soc_device_register(void)
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{
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struct soc_device_attribute *attr;
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struct soc_device *dev;
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attr = kzalloc(sizeof(*attr), GFP_KERNEL);
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if (!attr)
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return NULL;
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attr->family = kasprintf(GFP_KERNEL, "Tegra");
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attr->revision = kasprintf(GFP_KERNEL, "%d", tegra_sku_info.revision);
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attr->soc_id = kasprintf(GFP_KERNEL, "%u", tegra_get_chip_id());
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dev = soc_device_register(attr);
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if (IS_ERR(dev)) {
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kfree(attr->soc_id);
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kfree(attr->revision);
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kfree(attr->family);
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kfree(attr);
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return ERR_CAST(dev);
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}
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return soc_device_to_device(dev);
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}
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static int __init tegra_init_fuse(void)
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{
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const struct of_device_id *match;
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@ -311,6 +338,23 @@ static int __init tegra_init_fuse(void)
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pr_debug("Tegra CPU Speedo ID %d, SoC Speedo ID %d\n",
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tegra_sku_info.cpu_speedo_id, tegra_sku_info.soc_speedo_id);
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return 0;
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}
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early_initcall(tegra_init_fuse);
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#ifdef CONFIG_ARM64
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static int __init tegra_init_soc(void)
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{
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struct device *soc;
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soc = tegra_soc_device_register();
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if (IS_ERR(soc)) {
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pr_err("failed to register SoC device: %ld\n", PTR_ERR(soc));
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return PTR_ERR(soc);
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}
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return 0;
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}
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device_initcall(tegra_init_soc)
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#endif
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@ -65,6 +65,8 @@ int tegra_fuse_readl(unsigned long offset, u32 *value);
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extern struct tegra_sku_info tegra_sku_info;
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struct device *tegra_soc_device_register(void);
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#endif /* __ASSEMBLY__ */
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#endif /* __SOC_TEGRA_FUSE_H__ */
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