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ARM: SAMSUNG: Do not register legacy timer interrupts on Exynos
This patch removes legacy PWM timer interrupt initialization from exynos{4,5}_init_irq() functions, since it conflicts with internal interrupt handling of the new PWM clocksource driver. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Olof Johansson <olof@lixom.net>
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@ -456,13 +456,6 @@ void __init exynos4_init_irq(void)
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if (!of_have_populated_dt())
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if (!of_have_populated_dt())
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combiner_init(S5P_VA_COMBINER_BASE, NULL);
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combiner_init(S5P_VA_COMBINER_BASE, NULL);
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/*
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* The parameters of s5p_init_irq() are for VIC init.
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* Theses parameters should be NULL and 0 because EXYNOS4
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* uses GIC instead of VIC.
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*/
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s5p_init_irq(NULL, 0);
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}
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}
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void __init exynos5_init_irq(void)
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void __init exynos5_init_irq(void)
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@ -470,14 +463,6 @@ void __init exynos5_init_irq(void)
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#ifdef CONFIG_OF
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#ifdef CONFIG_OF
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irqchip_init();
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irqchip_init();
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#endif
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#endif
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/*
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* The parameters of s5p_init_irq() are for VIC init.
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* Theses parameters should be NULL and 0 because EXYNOS4
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* uses GIC instead of VIC.
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*/
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if (!of_machine_is_compatible("samsung,exynos5440"))
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s5p_init_irq(NULL, 0);
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gic_arch_extn.irq_set_wake = s3c_irq_wake;
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gic_arch_extn.irq_set_wake = s3c_irq_wake;
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}
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}
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@ -101,9 +101,9 @@ config SAMSUNG_IRQ_VIC_TIMER
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Internal configuration to build the VIC timer interrupt code.
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Internal configuration to build the VIC timer interrupt code.
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config S5P_IRQ
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config S5P_IRQ
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def_bool (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210 || ARCH_EXYNOS)
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def_bool (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210)
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help
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help
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Support common interrup part for ARCH_S5P and ARCH_EXYNOS SoCs
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Support common interrupt part for ARCH_S5P SoCs
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config S5P_EXT_INT
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config S5P_EXT_INT
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bool
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bool
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