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drm/tegra: Fixes for v4.5-rc7
Two small fixes that restore PRIME support. -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQIcBAABCAAGBQJW2anuAAoJEN0jrNd/PrOh13MQALkg+XDrpvSoE+EKezEx1p6W MDFjNF8jMuxX+5VNudKjghKr7MRXEmiAY+8BvF7t1+jpQB5eK/t7VKF0PS1Zu1ZW /hwtbeFP+DexIM3vz0y1KA0ixCQWt4v1aGMaj6R2n2BNoC0jVlGPHxFBGfRZj2hs R/MgjRmh1Em0h8me+Bbao3K79DlH1rtieXtHgIDZ1tPG1N/aKfhR9R+xw0IB9cRe FCuClsaUuY8Cj70bialoXyxkS/rlb4nNmHNdY1QA4EUSVpij/8iJ2jZNOlfLr7Fr 4AKcXGRz95OED8v3IS/RwyabYZ8cy5ZHQsfpRJbs771vMSbG+KDsQYtgpcQ6ytKY TQ82ibbkR6YmHblJ62GRxmQFGUut5ZztZ3c3mn/l2LUR74S2vGpbXn22Sa+dC1IG 2Hx1sNCs7zk9BgKhaUDTpwGSiMtV0CgDuUS8joCXG2oHmQoDUChyi7kX5ipkQVhl 0OvK8A3D5roBCbgeBT2yK1m7ckwLrwihxrkMArq/397h9AyUwYztPupxoHKP9x1p HwnqvsHANCjA+32k4JlUx2MyatOmiR2Fd6d5dvyxbJ6PzoD39IjZWW8g6TzYSjES 4ejNJGIg3JL2kshRbr/O13YPuG/fbhNfKTV/QJCJZMkZ1lhye5jvJnCtc11/JN1A INS5gV8PKid90GuQA4Bq =u/CF -----END PGP SIGNATURE----- Merge tag 'drm/tegra/for-4.5-rc7' of git://anongit.freedesktop.org/tegra/linux into drm-fixes drm/tegra: Fixes for v4.5-rc7 Two small fixes that restore PRIME support. * tag 'drm/tegra/for-4.5-rc7' of git://anongit.freedesktop.org/tegra/linux: gpu: host1x: Set DMA ops on device creation gpu: host1x: Set DMA mask
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commit
26bae5e04c
@ -18,6 +18,7 @@
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#include <linux/host1x.h>
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#include <linux/of.h>
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#include <linux/slab.h>
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#include <linux/of_device.h>
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#include "bus.h"
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#include "dev.h"
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@ -394,6 +395,7 @@ static int host1x_device_add(struct host1x *host1x,
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device->dev.coherent_dma_mask = host1x->dev->coherent_dma_mask;
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device->dev.dma_mask = &device->dev.coherent_dma_mask;
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dev_set_name(&device->dev, "%s", driver->driver.name);
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of_dma_configure(&device->dev, host1x->dev->of_node);
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device->dev.release = host1x_device_release;
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device->dev.bus = &host1x_bus_type;
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device->dev.parent = host1x->dev;
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@ -23,6 +23,7 @@
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#include <linux/of_device.h>
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <linux/dma-mapping.h>
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#define CREATE_TRACE_POINTS
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#include <trace/events/host1x.h>
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@ -68,6 +69,7 @@ static const struct host1x_info host1x01_info = {
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.nb_bases = 8,
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.init = host1x01_init,
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.sync_offset = 0x3000,
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.dma_mask = DMA_BIT_MASK(32),
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};
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static const struct host1x_info host1x02_info = {
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@ -77,6 +79,7 @@ static const struct host1x_info host1x02_info = {
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.nb_bases = 12,
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.init = host1x02_init,
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.sync_offset = 0x3000,
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.dma_mask = DMA_BIT_MASK(32),
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};
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static const struct host1x_info host1x04_info = {
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@ -86,6 +89,7 @@ static const struct host1x_info host1x04_info = {
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.nb_bases = 64,
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.init = host1x04_init,
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.sync_offset = 0x2100,
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.dma_mask = DMA_BIT_MASK(34),
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};
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static const struct host1x_info host1x05_info = {
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@ -95,6 +99,7 @@ static const struct host1x_info host1x05_info = {
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.nb_bases = 64,
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.init = host1x05_init,
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.sync_offset = 0x2100,
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.dma_mask = DMA_BIT_MASK(34),
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};
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static struct of_device_id host1x_of_match[] = {
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@ -148,6 +153,8 @@ static int host1x_probe(struct platform_device *pdev)
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if (IS_ERR(host->regs))
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return PTR_ERR(host->regs);
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dma_set_mask_and_coherent(host->dev, host->info->dma_mask);
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if (host->info->init) {
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err = host->info->init(host);
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if (err)
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@ -96,6 +96,7 @@ struct host1x_info {
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int nb_mlocks; /* host1x: number of mlocks */
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int (*init)(struct host1x *); /* initialize per SoC ops */
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int sync_offset;
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u64 dma_mask; /* mask of addressable memory */
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};
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struct host1x {
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