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selftests/bpf: Add verifier tests for better jmp32 register bounds
Three test cases are added. Test 1: jmp32 'reg op imm'. Test 2: jmp32 'reg op reg' where dst 'reg' has unknown constant and src 'reg' has known constant Test 3: jmp32 'reg op reg' where dst 'reg' has known constant and src 'reg' has unknown constant Signed-off-by: Yonghong Song <yhs@fb.com> Signed-off-by: Alexei Starovoitov <ast@kernel.org> Link: https://lore.kernel.org/bpf/20191121170651.449096-1-yhs@fb.com
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@ -744,3 +744,86 @@
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.result = ACCEPT,
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.retval = 2,
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},
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{
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"jgt32: range bound deduction, reg op imm",
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.insns = {
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BPF_ST_MEM(BPF_DW, BPF_REG_10, -8, 0),
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BPF_MOV64_REG(BPF_REG_8, BPF_REG_1),
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BPF_MOV64_REG(BPF_REG_2, BPF_REG_10),
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BPF_ALU64_IMM(BPF_ADD, BPF_REG_2, -8),
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BPF_LD_MAP_FD(BPF_REG_1, 0),
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BPF_RAW_INSN(BPF_JMP | BPF_CALL, 0, 0, 0, BPF_FUNC_map_lookup_elem),
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BPF_JMP_IMM(BPF_JEQ, BPF_REG_0, 0, 9),
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BPF_MOV64_REG(BPF_REG_1, BPF_REG_8),
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BPF_MOV64_REG(BPF_REG_8, BPF_REG_0),
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BPF_EMIT_CALL(BPF_FUNC_get_cgroup_classid),
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BPF_JMP32_IMM(BPF_JGT, BPF_REG_0, 1, 5),
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BPF_MOV32_REG(BPF_REG_6, BPF_REG_0),
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BPF_ALU64_IMM(BPF_LSH, BPF_REG_6, 32),
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BPF_ALU64_IMM(BPF_RSH, BPF_REG_6, 32),
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BPF_ALU64_REG(BPF_ADD, BPF_REG_8, BPF_REG_6),
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BPF_ST_MEM(BPF_B, BPF_REG_8, 0, 0),
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BPF_MOV32_IMM(BPF_REG_0, 0),
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BPF_EXIT_INSN(),
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},
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.prog_type = BPF_PROG_TYPE_SCHED_CLS,
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.fixup_map_hash_48b = { 4 },
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.result = ACCEPT,
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.flags = F_NEEDS_EFFICIENT_UNALIGNED_ACCESS,
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},
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{
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"jgt32: range bound deduction, reg1 op reg2, reg1 unknown",
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.insns = {
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BPF_ST_MEM(BPF_DW, BPF_REG_10, -8, 0),
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BPF_MOV64_REG(BPF_REG_8, BPF_REG_1),
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BPF_MOV64_REG(BPF_REG_2, BPF_REG_10),
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BPF_ALU64_IMM(BPF_ADD, BPF_REG_2, -8),
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BPF_LD_MAP_FD(BPF_REG_1, 0),
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BPF_RAW_INSN(BPF_JMP | BPF_CALL, 0, 0, 0, BPF_FUNC_map_lookup_elem),
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BPF_JMP_IMM(BPF_JEQ, BPF_REG_0, 0, 10),
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BPF_MOV64_REG(BPF_REG_1, BPF_REG_8),
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BPF_MOV64_REG(BPF_REG_8, BPF_REG_0),
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BPF_EMIT_CALL(BPF_FUNC_get_cgroup_classid),
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BPF_MOV32_IMM(BPF_REG_2, 1),
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BPF_JMP32_REG(BPF_JGT, BPF_REG_0, BPF_REG_2, 5),
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BPF_MOV32_REG(BPF_REG_6, BPF_REG_0),
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BPF_ALU64_IMM(BPF_LSH, BPF_REG_6, 32),
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BPF_ALU64_IMM(BPF_RSH, BPF_REG_6, 32),
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BPF_ALU64_REG(BPF_ADD, BPF_REG_8, BPF_REG_6),
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BPF_ST_MEM(BPF_B, BPF_REG_8, 0, 0),
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BPF_MOV32_IMM(BPF_REG_0, 0),
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BPF_EXIT_INSN(),
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},
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.prog_type = BPF_PROG_TYPE_SCHED_CLS,
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.fixup_map_hash_48b = { 4 },
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.result = ACCEPT,
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.flags = F_NEEDS_EFFICIENT_UNALIGNED_ACCESS,
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},
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{
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"jle32: range bound deduction, reg1 op reg2, reg2 unknown",
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.insns = {
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BPF_ST_MEM(BPF_DW, BPF_REG_10, -8, 0),
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BPF_MOV64_REG(BPF_REG_8, BPF_REG_1),
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BPF_MOV64_REG(BPF_REG_2, BPF_REG_10),
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BPF_ALU64_IMM(BPF_ADD, BPF_REG_2, -8),
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BPF_LD_MAP_FD(BPF_REG_1, 0),
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BPF_RAW_INSN(BPF_JMP | BPF_CALL, 0, 0, 0, BPF_FUNC_map_lookup_elem),
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BPF_JMP_IMM(BPF_JEQ, BPF_REG_0, 0, 10),
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BPF_MOV64_REG(BPF_REG_1, BPF_REG_8),
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BPF_MOV64_REG(BPF_REG_8, BPF_REG_0),
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BPF_EMIT_CALL(BPF_FUNC_get_cgroup_classid),
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BPF_MOV32_IMM(BPF_REG_2, 1),
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BPF_JMP32_REG(BPF_JLE, BPF_REG_2, BPF_REG_0, 5),
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BPF_MOV32_REG(BPF_REG_6, BPF_REG_0),
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BPF_ALU64_IMM(BPF_LSH, BPF_REG_6, 32),
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BPF_ALU64_IMM(BPF_RSH, BPF_REG_6, 32),
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BPF_ALU64_REG(BPF_ADD, BPF_REG_8, BPF_REG_6),
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BPF_ST_MEM(BPF_B, BPF_REG_8, 0, 0),
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BPF_MOV32_IMM(BPF_REG_0, 0),
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BPF_EXIT_INSN(),
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},
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.prog_type = BPF_PROG_TYPE_SCHED_CLS,
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.fixup_map_hash_48b = { 4 },
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.result = ACCEPT,
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.flags = F_NEEDS_EFFICIENT_UNALIGNED_ACCESS,
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},
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