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sh: Have SH-5 provide an {en,dis}able_fpu() impl.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This commit is contained in:
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27a511c6f3
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@ -74,9 +74,9 @@ get_fpu_long(struct task_struct *task, unsigned long addr)
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}
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}
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if (last_task_used_math == task) {
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if (last_task_used_math == task) {
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grab_fpu();
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enable_fpu();
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fpsave(&task->thread.fpu.hard);
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fpsave(&task->thread.fpu.hard);
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release_fpu();
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disable_fpu();
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last_task_used_math = 0;
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last_task_used_math = 0;
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regs->sr |= SR_FD;
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regs->sr |= SR_FD;
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}
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}
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@ -110,9 +110,9 @@ put_fpu_long(struct task_struct *task, unsigned long addr, unsigned long data)
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fpinit(&task->thread.fpu.hard);
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fpinit(&task->thread.fpu.hard);
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set_stopped_child_used_math(task);
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set_stopped_child_used_math(task);
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} else if (last_task_used_math == task) {
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} else if (last_task_used_math == task) {
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grab_fpu();
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enable_fpu();
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fpsave(&task->thread.fpu.hard);
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fpsave(&task->thread.fpu.hard);
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release_fpu();
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disable_fpu();
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last_task_used_math = 0;
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last_task_used_math = 0;
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regs->sr |= SR_FD;
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regs->sr |= SR_FD;
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}
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}
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@ -617,9 +617,9 @@ static int misaligned_fpu_load(struct pt_regs *regs,
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context switch the registers into memory so they can be
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context switch the registers into memory so they can be
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indexed by register number. */
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indexed by register number. */
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if (last_task_used_math == current) {
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if (last_task_used_math == current) {
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grab_fpu();
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enable_fpu();
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fpsave(¤t->thread.fpu.hard);
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fpsave(¤t->thread.fpu.hard);
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release_fpu();
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disable_fpu();
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last_task_used_math = NULL;
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last_task_used_math = NULL;
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regs->sr |= SR_FD;
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regs->sr |= SR_FD;
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}
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}
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@ -690,9 +690,9 @@ static int misaligned_fpu_store(struct pt_regs *regs,
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context switch the registers into memory so they can be
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context switch the registers into memory so they can be
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indexed by register number. */
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indexed by register number. */
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if (last_task_used_math == current) {
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if (last_task_used_math == current) {
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grab_fpu();
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enable_fpu();
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fpsave(¤t->thread.fpu.hard);
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fpsave(¤t->thread.fpu.hard);
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release_fpu();
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disable_fpu();
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last_task_used_math = NULL;
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last_task_used_math = NULL;
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regs->sr |= SR_FD;
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regs->sr |= SR_FD;
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}
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}
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@ -18,6 +18,7 @@
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#include <asm/page.h>
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#include <asm/page.h>
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#include <asm/types.h>
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#include <asm/types.h>
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#include <asm/cache.h>
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#include <asm/cache.h>
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#include <asm/ptrace.h>
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#include <asm/cpu/registers.h>
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#include <asm/cpu/registers.h>
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/*
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/*
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@ -218,7 +219,7 @@ extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
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* FPU lazy state save handling.
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* FPU lazy state save handling.
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*/
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*/
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static inline void release_fpu(void)
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static inline void disable_fpu(void)
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{
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{
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unsigned long long __dummy;
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unsigned long long __dummy;
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@ -230,7 +231,7 @@ static inline void release_fpu(void)
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: "r" (SR_FD));
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: "r" (SR_FD));
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}
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}
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static inline void grab_fpu(void)
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static inline void enable_fpu(void)
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{
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{
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unsigned long long __dummy;
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unsigned long long __dummy;
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@ -242,6 +243,16 @@ static inline void grab_fpu(void)
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: "r" (~SR_FD));
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: "r" (~SR_FD));
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}
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}
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static inline void release_fpu(struct pt_regs *regs)
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{
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regs->sr |= SR_FD;
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}
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static inline void grab_fpu(struct pt_regs *regs)
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{
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regs->sr &= ~SR_FD;
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}
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/* Round to nearest, no exceptions on inexact, overflow, underflow,
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/* Round to nearest, no exceptions on inexact, overflow, underflow,
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zero-divide, invalid. Configure option for whether to flush denorms to
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zero-divide, invalid. Configure option for whether to flush denorms to
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zero, or except if a denorm is encountered. */
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zero, or except if a denorm is encountered. */
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