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powerpc, hw_breakpoint: Handle concurrent alignment interrupts
If an alignment interrupt occurs on an instruction that is being single-stepped, the alignment interrupt handler currently handles the single-step condition by unconditionally sending a SIGTRAP to the process. Other synchronous interrupts that result in the instruction being emulated do likewise. With hw_breakpoint support, the hw_breakpoint code needs to be able to intercept these single-step events as well as those where the instruction executes normally and a trace interrupt happens. Fix this by making emulate_single_step() use the existing single_step_exception() function instead of calling _exception() directly. We then make single_step_exception() use the abstracted clear_single_step() rather than clearing bits in the MSR image directly so that emulate_single_step() will continue to work correctly on Book 3E processors. Signed-off-by: K.Prasad <prasad@linux.vnet.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
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@ -688,7 +688,7 @@ void RunModeException(struct pt_regs *regs)
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void __kprobes single_step_exception(struct pt_regs *regs)
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{
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regs->msr &= ~(MSR_SE | MSR_BE); /* Turn off 'trace' bits */
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clear_single_step(regs);
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if (notify_die(DIE_SSTEP, "single_step", regs, 5,
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5, SIGTRAP) == NOTIFY_STOP)
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@ -707,10 +707,8 @@ void __kprobes single_step_exception(struct pt_regs *regs)
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*/
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static void emulate_single_step(struct pt_regs *regs)
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{
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if (single_stepping(regs)) {
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clear_single_step(regs);
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_exception(SIGTRAP, regs, TRAP_TRACE, 0);
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}
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if (single_stepping(regs))
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single_step_exception(regs);
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}
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static inline int __parse_fpscr(unsigned long fpscr)
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