ASoC: Intel: Skylake: Remove soc-topology ABI v4 support

The only known users are Chromebook configurations. Starting from
kernel v5.4, all of them are making use of soc-topology ABI v5.

Cc: Curtis Malainey <cujomalainey@chromium.org>
Cc: Łukasz Majczak <lmajczak@google.com>
Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com>
Link: https://msgid.link/r/20240403091629.647267-2-cezary.rojewski@intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Cezary Rojewski 2024-04-03 11:16:26 +02:00 committed by Mark Brown
parent 4cece76496
commit 251ea65205
No known key found for this signature in database
GPG Key ID: 24D68B725D5487D0
2 changed files with 0 additions and 243 deletions

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@ -165,78 +165,4 @@ enum skl_tuple_type {
SKL_TYPE_DATA
};
/* v4 configuration data */
struct skl_dfw_v4_module_pin {
__u16 module_id;
__u16 instance_id;
} __packed;
struct skl_dfw_v4_module_fmt {
__u32 channels;
__u32 freq;
__u32 bit_depth;
__u32 valid_bit_depth;
__u32 ch_cfg;
__u32 interleaving_style;
__u32 sample_type;
__u32 ch_map;
} __packed;
struct skl_dfw_v4_module_caps {
__u32 set_params:2;
__u32 rsvd:30;
__u32 param_id;
__u32 caps_size;
__u32 caps[HDA_SST_CFG_MAX];
} __packed;
struct skl_dfw_v4_pipe {
__u8 pipe_id;
__u8 pipe_priority;
__u16 conn_type:4;
__u16 rsvd:4;
__u16 memory_pages:8;
} __packed;
struct skl_dfw_v4_module {
char uuid[SKL_UUID_STR_SZ];
__u16 module_id;
__u16 instance_id;
__u32 max_mcps;
__u32 mem_pages;
__u32 obs;
__u32 ibs;
__u32 vbus_id;
__u32 max_in_queue:8;
__u32 max_out_queue:8;
__u32 time_slot:8;
__u32 core_id:4;
__u32 rsvd1:4;
__u32 module_type:8;
__u32 conn_type:4;
__u32 dev_type:4;
__u32 hw_conn_type:4;
__u32 rsvd2:12;
__u32 params_fixup:8;
__u32 converter:8;
__u32 input_pin_type:1;
__u32 output_pin_type:1;
__u32 is_dynamic_in_pin:1;
__u32 is_dynamic_out_pin:1;
__u32 is_loadable:1;
__u32 rsvd3:11;
struct skl_dfw_v4_pipe pipe;
struct skl_dfw_v4_module_fmt in_fmt[MAX_IN_QUEUE];
struct skl_dfw_v4_module_fmt out_fmt[MAX_OUT_QUEUE];
struct skl_dfw_v4_module_pin in_pin[MAX_IN_QUEUE];
struct skl_dfw_v4_module_pin out_pin[MAX_OUT_QUEUE];
struct skl_dfw_v4_module_caps caps;
} __packed;
#endif

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@ -2682,168 +2682,6 @@ static int skl_tplg_get_desc_blocks(struct device *dev,
return -EINVAL;
}
/* Functions to parse private data from configuration file format v4 */
/*
* Add pipeline from topology binary into driver pipeline list
*
* If already added we return that instance
* Otherwise we create a new instance and add into driver list
*/
static int skl_tplg_add_pipe_v4(struct device *dev,
struct skl_module_cfg *mconfig, struct skl_dev *skl,
struct skl_dfw_v4_pipe *dfw_pipe)
{
struct skl_pipeline *ppl;
struct skl_pipe *pipe;
struct skl_pipe_params *params;
list_for_each_entry(ppl, &skl->ppl_list, node) {
if (ppl->pipe->ppl_id == dfw_pipe->pipe_id) {
mconfig->pipe = ppl->pipe;
return 0;
}
}
ppl = devm_kzalloc(dev, sizeof(*ppl), GFP_KERNEL);
if (!ppl)
return -ENOMEM;
pipe = devm_kzalloc(dev, sizeof(*pipe), GFP_KERNEL);
if (!pipe)
return -ENOMEM;
params = devm_kzalloc(dev, sizeof(*params), GFP_KERNEL);
if (!params)
return -ENOMEM;
pipe->ppl_id = dfw_pipe->pipe_id;
pipe->memory_pages = dfw_pipe->memory_pages;
pipe->pipe_priority = dfw_pipe->pipe_priority;
pipe->conn_type = dfw_pipe->conn_type;
pipe->state = SKL_PIPE_INVALID;
pipe->p_params = params;
INIT_LIST_HEAD(&pipe->w_list);
ppl->pipe = pipe;
list_add(&ppl->node, &skl->ppl_list);
mconfig->pipe = pipe;
return 0;
}
static void skl_fill_module_pin_info_v4(struct skl_dfw_v4_module_pin *dfw_pin,
struct skl_module_pin *m_pin,
bool is_dynamic, int max_pin)
{
int i;
for (i = 0; i < max_pin; i++) {
m_pin[i].id.module_id = dfw_pin[i].module_id;
m_pin[i].id.instance_id = dfw_pin[i].instance_id;
m_pin[i].in_use = false;
m_pin[i].is_dynamic = is_dynamic;
m_pin[i].pin_state = SKL_PIN_UNBIND;
}
}
static void skl_tplg_fill_fmt_v4(struct skl_module_pin_fmt *dst_fmt,
struct skl_dfw_v4_module_fmt *src_fmt,
int pins)
{
int i;
for (i = 0; i < pins; i++) {
dst_fmt[i].fmt.channels = src_fmt[i].channels;
dst_fmt[i].fmt.s_freq = src_fmt[i].freq;
dst_fmt[i].fmt.bit_depth = src_fmt[i].bit_depth;
dst_fmt[i].fmt.valid_bit_depth = src_fmt[i].valid_bit_depth;
dst_fmt[i].fmt.ch_cfg = src_fmt[i].ch_cfg;
dst_fmt[i].fmt.ch_map = src_fmt[i].ch_map;
dst_fmt[i].fmt.interleaving_style =
src_fmt[i].interleaving_style;
dst_fmt[i].fmt.sample_type = src_fmt[i].sample_type;
}
}
static int skl_tplg_get_pvt_data_v4(struct snd_soc_tplg_dapm_widget *tplg_w,
struct skl_dev *skl, struct device *dev,
struct skl_module_cfg *mconfig)
{
struct skl_dfw_v4_module *dfw =
(struct skl_dfw_v4_module *)tplg_w->priv.data;
int ret;
int idx = mconfig->fmt_cfg_idx;
dev_dbg(dev, "Parsing Skylake v4 widget topology data\n");
ret = guid_parse(dfw->uuid, (guid_t *)mconfig->guid);
if (ret)
return ret;
mconfig->id.module_id = -1;
mconfig->id.instance_id = dfw->instance_id;
mconfig->module->resources[0].cpc = dfw->max_mcps / 1000;
mconfig->module->resources[0].ibs = dfw->ibs;
mconfig->module->resources[0].obs = dfw->obs;
mconfig->core_id = dfw->core_id;
mconfig->module->max_input_pins = dfw->max_in_queue;
mconfig->module->max_output_pins = dfw->max_out_queue;
mconfig->module->loadable = dfw->is_loadable;
skl_tplg_fill_fmt_v4(mconfig->module->formats[0].inputs, dfw->in_fmt,
MAX_IN_QUEUE);
skl_tplg_fill_fmt_v4(mconfig->module->formats[0].outputs, dfw->out_fmt,
MAX_OUT_QUEUE);
mconfig->params_fixup = dfw->params_fixup;
mconfig->converter = dfw->converter;
mconfig->m_type = dfw->module_type;
mconfig->vbus_id = dfw->vbus_id;
mconfig->module->resources[0].is_pages = dfw->mem_pages;
ret = skl_tplg_add_pipe_v4(dev, mconfig, skl, &dfw->pipe);
if (ret)
return ret;
mconfig->dev_type = dfw->dev_type;
mconfig->hw_conn_type = dfw->hw_conn_type;
mconfig->time_slot = dfw->time_slot;
mconfig->formats_config[idx].caps_size = dfw->caps.caps_size;
mconfig->m_in_pin = devm_kcalloc(dev,
MAX_IN_QUEUE, sizeof(*mconfig->m_in_pin),
GFP_KERNEL);
if (!mconfig->m_in_pin)
return -ENOMEM;
mconfig->m_out_pin = devm_kcalloc(dev,
MAX_OUT_QUEUE, sizeof(*mconfig->m_out_pin),
GFP_KERNEL);
if (!mconfig->m_out_pin)
return -ENOMEM;
skl_fill_module_pin_info_v4(dfw->in_pin, mconfig->m_in_pin,
dfw->is_dynamic_in_pin,
mconfig->module->max_input_pins);
skl_fill_module_pin_info_v4(dfw->out_pin, mconfig->m_out_pin,
dfw->is_dynamic_out_pin,
mconfig->module->max_output_pins);
if (mconfig->formats_config[idx].caps_size) {
mconfig->formats_config[idx].set_params = dfw->caps.set_params;
mconfig->formats_config[idx].param_id = dfw->caps.param_id;
mconfig->formats_config[idx].caps =
devm_kzalloc(dev, mconfig->formats_config[idx].caps_size,
GFP_KERNEL);
if (!mconfig->formats_config[idx].caps)
return -ENOMEM;
memcpy(mconfig->formats_config[idx].caps, dfw->caps.caps,
dfw->caps.caps_size);
}
return 0;
}
static int skl_tplg_get_caps_data(struct device *dev, char *data,
struct skl_module_cfg *mconfig)
{
@ -2877,13 +2715,6 @@ static int skl_tplg_get_pvt_data(struct snd_soc_tplg_dapm_widget *tplg_w,
char *data;
int ret;
/*
* v4 configuration files have a valid UUID at the start of
* the widget's private data.
*/
if (uuid_is_valid((char *)tplg_w->priv.data))
return skl_tplg_get_pvt_data_v4(tplg_w, skl, dev, mconfig);
/* Read the NUM_DATA_BLOCKS descriptor */
array = (struct snd_soc_tplg_vendor_array *)tplg_w->priv.data;
ret = skl_tplg_get_desc_blocks(dev, array);