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ARM: exynos: Only build MCPM support if used

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We get a link error for configurations that enable an Exynos
SoC that does not require MCPM, but then manually enable
MCPM anyway without also turning on the arm-cci:

arch/arm/mach-exynos/mcpm-exynos.o: In function `exynos_pm_power_up_setup':
mcpm-exynos.c:(.text+0x8): undefined reference to `cci_enable_port_for_self'

Change it back to only build the code we actually need, by
introducing a CONFIG_EXYNOS_MCPM that serves the same purpose
as the older CONFIG_EXYNOS5420_MCPM.

Fixes: 2997520c2d ("ARM: exynos: Set MCPM as mandatory for Exynos542x/5800 SoCs")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
This commit is contained in:
Arnd Bergmann 2019-06-19 14:55:29 +02:00 committed by Krzysztof Kozlowski
parent 0cca82ec34
commit 24d2c73ff2
3 changed files with 9 additions and 5 deletions
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6
arch/arm/mach-exynos/Kconfig
View File

@ -107,7 +107,7 @@ config SOC_EXYNOS5420
bool "SAMSUNG EXYNOS5420" bool "SAMSUNG EXYNOS5420"
default y default y
depends on ARCH_EXYNOS5 depends on ARCH_EXYNOS5
select MCPM if SMP select EXYNOS_MCPM if SMP
select ARM_CCI400_PORT_CTRL select ARM_CCI400_PORT_CTRL
select ARM_CPU_SUSPEND select ARM_CPU_SUSPEND
@ -116,6 +116,10 @@ config SOC_EXYNOS5800
default y default y
depends on SOC_EXYNOS5420 depends on SOC_EXYNOS5420
config EXYNOS_MCPM
bool
select MCPM
config EXYNOS_CPU_SUSPEND config EXYNOS_CPU_SUSPEND
bool bool
select ARM_CPU_SUSPEND select ARM_CPU_SUSPEND

2
arch/arm/mach-exynos/Makefile
View File

@ -18,5 +18,5 @@ plus_sec := $(call as-instr,.arch_extension sec,+sec)
AFLAGS_exynos-smc.o :=-Wa,-march=armv7-a$(plus_sec) AFLAGS_exynos-smc.o :=-Wa,-march=armv7-a$(plus_sec)
AFLAGS_sleep.o :=-Wa,-march=armv7-a$(plus_sec) AFLAGS_sleep.o :=-Wa,-march=armv7-a$(plus_sec)
obj-$(CONFIG_MCPM) += mcpm-exynos.o obj-$(CONFIG_EXYNOS_MCPM) += mcpm-exynos.o
CFLAGS_mcpm-exynos.o += -march=armv7-a CFLAGS_mcpm-exynos.o += -march=armv7-a

6
arch/arm/mach-exynos/suspend.c
View File

@ -268,7 +268,7 @@ static int exynos5420_cpu_suspend(unsigned long arg)
unsigned int cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); unsigned int cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1);
unsigned int cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); unsigned int cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0);
if (IS_ENABLED(CONFIG_MCPM)) { if (IS_ENABLED(CONFIG_EXYNOS_MCPM)) {
mcpm_set_entry_vector(cpu, cluster, exynos_cpu_resume); mcpm_set_entry_vector(cpu, cluster, exynos_cpu_resume);
mcpm_cpu_suspend(); mcpm_cpu_suspend();
} }
@ -351,7 +351,7 @@ static void exynos5420_pm_prepare(void)
exynos_pm_enter_sleep_mode(); exynos_pm_enter_sleep_mode();
/* ensure at least INFORM0 has the resume address */ /* ensure at least INFORM0 has the resume address */
if (IS_ENABLED(CONFIG_MCPM)) if (IS_ENABLED(CONFIG_EXYNOS_MCPM))
pmu_raw_writel(__pa_symbol(mcpm_entry_point), S5P_INFORM0); pmu_raw_writel(__pa_symbol(mcpm_entry_point), S5P_INFORM0);
tmp = pmu_raw_readl(EXYNOS_L2_OPTION(0)); tmp = pmu_raw_readl(EXYNOS_L2_OPTION(0));
@ -455,7 +455,7 @@ static void exynos5420_prepare_pm_resume(void)
mpidr = read_cpuid_mpidr(); mpidr = read_cpuid_mpidr();
cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1);
if (IS_ENABLED(CONFIG_MCPM)) if (IS_ENABLED(CONFIG_EXYNOS_MCPM))
WARN_ON(mcpm_cpu_powered_up()); WARN_ON(mcpm_cpu_powered_up());
if (IS_ENABLED(CONFIG_HW_PERF_EVENTS) && cluster != 0) { if (IS_ENABLED(CONFIG_HW_PERF_EVENTS) && cluster != 0) {