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spi: rockchip: support "sleep" pin configuration

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In the pattern of many other devices, support a system-sleep pin
configuration.

Signed-off-by: Brian Norris <briannorris@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Tested-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Brian Norris 2016-12-16 16:59:16 -08:00 committed by Mark Brown
parent fafd679407
commit 23e291c2e4
2 changed files with 12 additions and 0 deletions
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7
Documentation/devicetree/bindings/spi/spi-rockchip.txt
View File

@ -31,6 +31,10 @@ Optional Properties:
- rx-sample-delay-ns: nanoseconds to delay after the SCLK edge before sampling
Rx data (may need to be fine tuned for high capacitance lines).
No delay (0) by default.
- pinctrl-names: Names for the pin configuration(s); may be "default" or
"sleep", where the "sleep" configuration may describe the state
the pins should be in during system suspend. See also
pinctrl/pinctrl-bindings.txt.
Example:
@ -46,4 +50,7 @@ Example:
interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>;
clock-names = "spiclk", "apb_pclk";
pinctrl-0 = <&spi1_pins>;
pinctrl-1 = <&spi1_sleep>;
pinctrl-names = "default", "sleep";
};

5
drivers/spi/spi-rockchip.c
View File

@ -17,6 +17,7 @@
#include <linux/dmaengine.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/pinctrl/consumer.h>
#include <linux/platform_device.h>
#include <linux/spi/spi.h>
#include <linux/pm_runtime.h>
@ -843,6 +844,8 @@ static int rockchip_spi_suspend(struct device *dev)
clk_disable_unprepare(rs->apb_pclk);
}
pinctrl_pm_select_sleep_state(dev);
return ret;
}
@ -852,6 +855,8 @@ static int rockchip_spi_resume(struct device *dev)
struct spi_master *master = dev_get_drvdata(dev);
struct rockchip_spi *rs = spi_master_get_devdata(master);
pinctrl_pm_select_default_state(dev);
if (!pm_runtime_suspended(dev)) {
ret = clk_prepare_enable(rs->apb_pclk);
if (ret < 0)