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net/fec: add imx6q enet support
The imx6q enet is a derivative of imx28 enet controller. It fixed the frame endian issue found on imx28, and added 1 Gbps support. It also fixes a typo on vendor name in Kconfig. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -7,7 +7,7 @@ config NET_VENDOR_FREESCALE
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default y
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depends on FSL_SOC || QUICC_ENGINE || CPM1 || CPM2 || PPC_MPC512x || \
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M523x || M527x || M5272 || M528x || M520x || M532x || \
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IMX_HAVE_PLATFORM_FEC || MXS_HAVE_PLATFORM_FEC || \
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ARCH_MXC || ARCH_MXS || \
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(PPC_MPC52xx && PPC_BESTCOMM)
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---help---
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If you have a network (Ethernet) card belonging to this class, say Y
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@ -16,16 +16,15 @@ config NET_VENDOR_FREESCALE
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Note that the answer to this question doesn't directly affect the
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kernel: saying N will just cause the configurator to skip all
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the questions about IBM devices. If you say Y, you will be asked for
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your specific card in the following questions.
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the questions about Freescale devices. If you say Y, you will be
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asked for your specific card in the following questions.
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if NET_VENDOR_FREESCALE
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config FEC
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bool "FEC ethernet controller (of ColdFire and some i.MX CPUs)"
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depends on (M523x || M527x || M5272 || M528x || M520x || M532x || \
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IMX_HAVE_PLATFORM_FEC || MXS_HAVE_PLATFORM_FEC)
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default IMX_HAVE_PLATFORM_FEC || MXS_HAVE_PLATFORM_FEC if ARM
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ARCH_MXC || ARCH_MXS)
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select PHYLIB
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---help---
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Say Y here if you want to use the built-in 10/100 Fast ethernet
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@ -18,7 +18,7 @@
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* Bug fixes and cleanup by Philippe De Muyter (phdm@macqel.be)
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* Copyright (c) 2004-2006 Macq Electronique SA.
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*
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* Copyright (C) 2010 Freescale Semiconductor, Inc.
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* Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
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*/
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#include <linux/module.h>
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@ -72,6 +72,8 @@
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#define FEC_QUIRK_SWAP_FRAME (1 << 1)
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/* Controller uses gasket */
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#define FEC_QUIRK_USE_GASKET (1 << 2)
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/* Controller has GBIT support */
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#define FEC_QUIRK_HAS_GBIT (1 << 3)
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static struct platform_device_id fec_devtype[] = {
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{
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@ -87,6 +89,9 @@ static struct platform_device_id fec_devtype[] = {
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}, {
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.name = "imx28-fec",
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.driver_data = FEC_QUIRK_ENET_MAC | FEC_QUIRK_SWAP_FRAME,
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}, {
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.name = "imx6q-fec",
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.driver_data = FEC_QUIRK_ENET_MAC | FEC_QUIRK_HAS_GBIT,
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}, {
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/* sentinel */
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}
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@ -97,12 +102,14 @@ enum imx_fec_type {
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IMX25_FEC = 1, /* runs on i.mx25/50/53 */
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IMX27_FEC, /* runs on i.mx27/35/51 */
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IMX28_FEC,
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IMX6Q_FEC,
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};
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static const struct of_device_id fec_dt_ids[] = {
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{ .compatible = "fsl,imx25-fec", .data = &fec_devtype[IMX25_FEC], },
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{ .compatible = "fsl,imx27-fec", .data = &fec_devtype[IMX27_FEC], },
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{ .compatible = "fsl,imx28-fec", .data = &fec_devtype[IMX28_FEC], },
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{ .compatible = "fsl,imx6q-fec", .data = &fec_devtype[IMX6Q_FEC], },
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{ /* sentinel */ }
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};
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MODULE_DEVICE_TABLE(of, fec_dt_ids);
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@ -373,6 +380,7 @@ fec_restart(struct net_device *ndev, int duplex)
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int i;
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u32 temp_mac[2];
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u32 rcntl = OPT_FRAME_SIZE | 0x04;
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u32 ecntl = 0x2; /* ETHEREN */
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/* Whack a reset. We should wait for this. */
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writel(1, fep->hwp + FEC_ECNTRL);
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@ -442,18 +450,23 @@ fec_restart(struct net_device *ndev, int duplex)
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/* Enable flow control and length check */
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rcntl |= 0x40000000 | 0x00000020;
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/* MII or RMII */
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if (fep->phy_interface == PHY_INTERFACE_MODE_RMII)
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/* RGMII, RMII or MII */
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if (fep->phy_interface == PHY_INTERFACE_MODE_RGMII)
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rcntl |= (1 << 6);
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else if (fep->phy_interface == PHY_INTERFACE_MODE_RMII)
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rcntl |= (1 << 8);
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else
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rcntl &= ~(1 << 8);
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/* 10M or 100M */
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if (fep->phy_dev && fep->phy_dev->speed == SPEED_100)
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rcntl &= ~(1 << 9);
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else
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rcntl |= (1 << 9);
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/* 1G, 100M or 10M */
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if (fep->phy_dev) {
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if (fep->phy_dev->speed == SPEED_1000)
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ecntl |= (1 << 5);
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else if (fep->phy_dev->speed == SPEED_100)
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rcntl &= ~(1 << 9);
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else
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rcntl |= (1 << 9);
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}
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} else {
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#ifdef FEC_MIIGSK_ENR
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if (id_entry->driver_data & FEC_QUIRK_USE_GASKET) {
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@ -478,8 +491,15 @@ fec_restart(struct net_device *ndev, int duplex)
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}
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writel(rcntl, fep->hwp + FEC_R_CNTRL);
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if (id_entry->driver_data & FEC_QUIRK_ENET_MAC) {
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/* enable ENET endian swap */
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ecntl |= (1 << 8);
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/* enable ENET store and forward mode */
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writel(1 << 8, fep->hwp + FEC_X_WMRK);
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}
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/* And last, enable the transmit and receive processing */
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writel(2, fep->hwp + FEC_ECNTRL);
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writel(ecntl, fep->hwp + FEC_ECNTRL);
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writel(0, fep->hwp + FEC_R_DES_ACTIVE);
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/* Enable interrupts we wish to service */
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@ -490,6 +510,8 @@ static void
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fec_stop(struct net_device *ndev)
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{
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struct fec_enet_private *fep = netdev_priv(ndev);
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const struct platform_device_id *id_entry =
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platform_get_device_id(fep->pdev);
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/* We cannot expect a graceful transmit stop without link !!! */
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if (fep->link) {
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@ -504,6 +526,10 @@ fec_stop(struct net_device *ndev)
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udelay(10);
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writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED);
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writel(FEC_DEFAULT_IMASK, fep->hwp + FEC_IMASK);
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/* We have to keep ENET enabled to have MII interrupt stay working */
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if (id_entry->driver_data & FEC_QUIRK_ENET_MAC)
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writel(2, fep->hwp + FEC_ECNTRL);
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}
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@ -918,6 +944,8 @@ static int fec_enet_mdio_reset(struct mii_bus *bus)
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static int fec_enet_mii_probe(struct net_device *ndev)
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{
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struct fec_enet_private *fep = netdev_priv(ndev);
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const struct platform_device_id *id_entry =
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platform_get_device_id(fep->pdev);
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struct phy_device *phy_dev = NULL;
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char mdio_bus_id[MII_BUS_ID_SIZE];
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char phy_name[MII_BUS_ID_SIZE + 3];
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@ -949,14 +977,18 @@ static int fec_enet_mii_probe(struct net_device *ndev)
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snprintf(phy_name, MII_BUS_ID_SIZE, PHY_ID_FMT, mdio_bus_id, phy_id);
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phy_dev = phy_connect(ndev, phy_name, &fec_enet_adjust_link, 0,
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PHY_INTERFACE_MODE_MII);
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fep->phy_interface);
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if (IS_ERR(phy_dev)) {
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printk(KERN_ERR "%s: could not attach to PHY\n", ndev->name);
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return PTR_ERR(phy_dev);
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}
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/* mask with MAC supported features */
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phy_dev->supported &= PHY_BASIC_FEATURES;
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if (id_entry->driver_data & FEC_QUIRK_HAS_GBIT)
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phy_dev->supported &= PHY_GBIT_FEATURES;
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else
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phy_dev->supported &= PHY_BASIC_FEATURES;
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phy_dev->advertising = phy_dev->supported;
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fep->phy_dev = phy_dev;
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@ -1006,8 +1038,16 @@ static int fec_enet_mii_init(struct platform_device *pdev)
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/*
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* Set MII speed to 2.5 MHz (= clk_get_rate() / 2 * phy_speed)
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*
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* The formula for FEC MDC is 'ref_freq / (MII_SPEED x 2)' while
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* for ENET-MAC is 'ref_freq / ((MII_SPEED + 1) x 2)'. The i.MX28
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* Reference Manual has an error on this, and gets fixed on i.MX6Q
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* document.
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*/
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fep->phy_speed = DIV_ROUND_UP(clk_get_rate(fep->clk), 5000000) << 1;
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fep->phy_speed = DIV_ROUND_UP(clk_get_rate(fep->clk), 5000000);
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if (id_entry->driver_data & FEC_QUIRK_ENET_MAC)
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fep->phy_speed--;
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fep->phy_speed <<= 1;
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writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED);
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fep->mii_bus = mdiobus_alloc();
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