mirror of
https://github.com/torvalds/linux.git
synced 2024-11-23 12:42:02 +00:00
Merge remote-tracking branch 'asoc/topic/davinci' into asoc-next
This commit is contained in:
commit
22849e45ff
@ -762,16 +762,19 @@ static u8 da850_iis_serializer_direction[] = {
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};
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static struct snd_platform_data da850_evm_snd_data = {
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.tx_dma_offset = 0x2000,
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.rx_dma_offset = 0x2000,
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.op_mode = DAVINCI_MCASP_IIS_MODE,
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.num_serializer = ARRAY_SIZE(da850_iis_serializer_direction),
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.tdm_slots = 2,
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.serial_dir = da850_iis_serializer_direction,
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.asp_chan_q = EVENTQ_0,
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.version = MCASP_VERSION_2,
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.txnumevt = 1,
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.rxnumevt = 1,
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.tx_dma_offset = 0x2000,
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.rx_dma_offset = 0x2000,
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.op_mode = DAVINCI_MCASP_IIS_MODE,
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.num_serializer = ARRAY_SIZE(da850_iis_serializer_direction),
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.tdm_slots = 2,
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.serial_dir = da850_iis_serializer_direction,
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.asp_chan_q = EVENTQ_0,
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.ram_chan_q = EVENTQ_1,
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.version = MCASP_VERSION_2,
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.txnumevt = 1,
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.rxnumevt = 1,
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.sram_size_playback = SZ_8K,
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.sram_size_capture = SZ_8K,
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};
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static const short da850_evm_mcasp_pins[] __initconst = {
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@ -1509,6 +1512,7 @@ static __init void da850_evm_init(void)
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pr_warning("da850_evm_init: mcasp mux setup failed: %d\n",
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ret);
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da850_evm_snd_data.sram_pool = sram_get_gen_pool();
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da8xx_register_mcasp(0, &da850_evm_snd_data);
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ret = davinci_cfg_reg_list(da850_lcdcntl_pins);
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@ -16,6 +16,8 @@
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#ifndef __DAVINCI_ASP_H
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#define __DAVINCI_ASP_H
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#include <linux/genalloc.h>
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struct snd_platform_data {
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u32 tx_dma_offset;
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u32 rx_dma_offset;
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@ -30,6 +32,7 @@ struct snd_platform_data {
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unsigned enable_channel_combine:1;
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unsigned sram_size_playback;
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unsigned sram_size_capture;
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struct gen_pool *sram_pool;
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/*
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* If McBSP peripheral gets the clock from an external pin,
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@ -71,6 +71,11 @@ static int evm_hw_params(struct snd_pcm_substream *substream,
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if (ret < 0)
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return ret;
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/* set the CPU system clock */
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ret = snd_soc_dai_set_sysclk(cpu_dai, 0, sysclk, SND_SOC_CLOCK_OUT);
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if (ret < 0)
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return ret;
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return 0;
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}
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@ -199,6 +199,7 @@
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#define ACLKXE BIT(5)
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#define TX_ASYNC BIT(6)
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#define ACLKXPOL BIT(7)
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#define ACLKXDIV_MASK 0x1f
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/*
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* DAVINCI_MCASP_ACLKRCTL_REG Receive Clock Control Register Bits
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@ -207,6 +208,7 @@
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#define ACLKRE BIT(5)
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#define RX_ASYNC BIT(6)
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#define ACLKRPOL BIT(7)
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#define ACLKRDIV_MASK 0x1f
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/*
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* DAVINCI_MCASP_AHCLKXCTL_REG - High Frequency Transmit Clock Control
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@ -215,6 +217,7 @@
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#define AHCLKXDIV(val) (val)
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#define AHCLKXPOL BIT(14)
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#define AHCLKXE BIT(15)
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#define AHCLKXDIV_MASK 0xfff
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/*
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* DAVINCI_MCASP_AHCLKRCTL_REG - High Frequency Receive Clock Control
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@ -223,6 +226,7 @@
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#define AHCLKRDIV(val) (val)
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#define AHCLKRPOL BIT(14)
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#define AHCLKRE BIT(15)
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#define AHCLKRDIV_MASK 0xfff
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/*
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* DAVINCI_MCASP_XRSRCTL_BASE_REG - Serializer Control Register Bits
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@ -473,6 +477,23 @@ static int davinci_mcasp_set_dai_fmt(struct snd_soc_dai *cpu_dai,
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struct davinci_audio_dev *dev = snd_soc_dai_get_drvdata(cpu_dai);
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void __iomem *base = dev->base;
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switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
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case SND_SOC_DAIFMT_DSP_B:
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case SND_SOC_DAIFMT_AC97:
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mcasp_clr_bits(dev->base + DAVINCI_MCASP_TXFMCTL_REG, FSXDUR);
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mcasp_clr_bits(dev->base + DAVINCI_MCASP_RXFMCTL_REG, FSRDUR);
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break;
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default:
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/* configure a full-word SYNC pulse (LRCLK) */
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mcasp_set_bits(dev->base + DAVINCI_MCASP_TXFMCTL_REG, FSXDUR);
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mcasp_set_bits(dev->base + DAVINCI_MCASP_RXFMCTL_REG, FSRDUR);
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/* make 1st data bit occur one ACLK cycle after the frame sync */
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mcasp_set_bits(dev->base + DAVINCI_MCASP_TXFMT_REG, FSXDLY(1));
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mcasp_set_bits(dev->base + DAVINCI_MCASP_RXFMT_REG, FSRDLY(1));
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break;
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}
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switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
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case SND_SOC_DAIFMT_CBS_CFS:
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/* codec is clock and frame slave */
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@ -482,8 +503,7 @@ static int davinci_mcasp_set_dai_fmt(struct snd_soc_dai *cpu_dai,
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mcasp_set_bits(base + DAVINCI_MCASP_ACLKRCTL_REG, ACLKRE);
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mcasp_set_bits(base + DAVINCI_MCASP_RXFMCTL_REG, AFSRE);
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mcasp_set_bits(base + DAVINCI_MCASP_PDIR_REG,
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ACLKX | AHCLKX | AFSX);
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mcasp_set_bits(base + DAVINCI_MCASP_PDIR_REG, ACLKX | AFSX);
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break;
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case SND_SOC_DAIFMT_CBM_CFS:
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/* codec is clock master and frame slave */
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@ -554,6 +574,50 @@ static int davinci_mcasp_set_dai_fmt(struct snd_soc_dai *cpu_dai,
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return 0;
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}
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static int davinci_mcasp_set_clkdiv(struct snd_soc_dai *dai, int div_id, int div)
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{
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struct davinci_audio_dev *dev = snd_soc_dai_get_drvdata(dai);
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switch (div_id) {
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case 0: /* MCLK divider */
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mcasp_mod_bits(dev->base + DAVINCI_MCASP_AHCLKXCTL_REG,
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AHCLKXDIV(div - 1), AHCLKXDIV_MASK);
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mcasp_mod_bits(dev->base + DAVINCI_MCASP_AHCLKRCTL_REG,
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AHCLKRDIV(div - 1), AHCLKRDIV_MASK);
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break;
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case 1: /* BCLK divider */
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mcasp_mod_bits(dev->base + DAVINCI_MCASP_ACLKXCTL_REG,
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ACLKXDIV(div - 1), ACLKXDIV_MASK);
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mcasp_mod_bits(dev->base + DAVINCI_MCASP_ACLKRCTL_REG,
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ACLKRDIV(div - 1), ACLKRDIV_MASK);
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break;
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default:
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return -EINVAL;
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}
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return 0;
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}
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static int davinci_mcasp_set_sysclk(struct snd_soc_dai *dai, int clk_id,
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unsigned int freq, int dir)
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{
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struct davinci_audio_dev *dev = snd_soc_dai_get_drvdata(dai);
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if (dir == SND_SOC_CLOCK_OUT) {
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mcasp_set_bits(dev->base + DAVINCI_MCASP_AHCLKXCTL_REG, AHCLKXE);
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mcasp_set_bits(dev->base + DAVINCI_MCASP_AHCLKRCTL_REG, AHCLKRE);
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mcasp_set_bits(dev->base + DAVINCI_MCASP_PDIR_REG, AHCLKX);
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} else {
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mcasp_clr_bits(dev->base + DAVINCI_MCASP_AHCLKXCTL_REG, AHCLKXE);
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mcasp_clr_bits(dev->base + DAVINCI_MCASP_AHCLKRCTL_REG, AHCLKRE);
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mcasp_clr_bits(dev->base + DAVINCI_MCASP_PDIR_REG, AHCLKX);
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}
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return 0;
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}
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static int davinci_config_channel_size(struct davinci_audio_dev *dev,
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int channel_size)
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{
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@ -709,8 +773,6 @@ static void davinci_hw_param(struct davinci_audio_dev *dev, int stream)
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if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
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/* bit stream is MSB first with no delay */
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/* DSP_B mode */
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mcasp_set_bits(dev->base + DAVINCI_MCASP_AHCLKXCTL_REG,
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AHCLKXE);
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mcasp_set_reg(dev->base + DAVINCI_MCASP_TXTDM_REG, mask);
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mcasp_set_bits(dev->base + DAVINCI_MCASP_TXFMT_REG, TXORD);
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@ -720,14 +782,10 @@ static void davinci_hw_param(struct davinci_audio_dev *dev, int stream)
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else
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printk(KERN_ERR "playback tdm slot %d not supported\n",
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dev->tdm_slots);
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mcasp_clr_bits(dev->base + DAVINCI_MCASP_TXFMCTL_REG, FSXDUR);
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} else {
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/* bit stream is MSB first with no delay */
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/* DSP_B mode */
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mcasp_set_bits(dev->base + DAVINCI_MCASP_RXFMT_REG, RXORD);
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mcasp_set_bits(dev->base + DAVINCI_MCASP_AHCLKRCTL_REG,
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AHCLKRE);
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mcasp_set_reg(dev->base + DAVINCI_MCASP_RXTDM_REG, mask);
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if ((dev->tdm_slots >= 2) && (dev->tdm_slots <= 32))
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@ -736,8 +794,6 @@ static void davinci_hw_param(struct davinci_audio_dev *dev, int stream)
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else
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printk(KERN_ERR "capture tdm slot %d not supported\n",
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dev->tdm_slots);
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mcasp_clr_bits(dev->base + DAVINCI_MCASP_RXFMCTL_REG, FSRDUR);
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}
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}
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@ -809,6 +865,14 @@ static int davinci_mcasp_hw_params(struct snd_pcm_substream *substream,
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word_length = DAVINCI_AUDIO_WORD_16;
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break;
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case SNDRV_PCM_FORMAT_U24_3LE:
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case SNDRV_PCM_FORMAT_S24_3LE:
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dma_params->data_type = 3;
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word_length = DAVINCI_AUDIO_WORD_24;
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break;
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case SNDRV_PCM_FORMAT_U24_LE:
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case SNDRV_PCM_FORMAT_S24_LE:
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case SNDRV_PCM_FORMAT_U32_LE:
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case SNDRV_PCM_FORMAT_S32_LE:
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dma_params->data_type = 4;
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@ -880,13 +944,18 @@ static const struct snd_soc_dai_ops davinci_mcasp_dai_ops = {
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.trigger = davinci_mcasp_trigger,
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.hw_params = davinci_mcasp_hw_params,
|
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.set_fmt = davinci_mcasp_set_dai_fmt,
|
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|
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.set_clkdiv = davinci_mcasp_set_clkdiv,
|
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.set_sysclk = davinci_mcasp_set_sysclk,
|
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};
|
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|
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#define DAVINCI_MCASP_PCM_FMTS (SNDRV_PCM_FMTBIT_S8 | \
|
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SNDRV_PCM_FMTBIT_U8 | \
|
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SNDRV_PCM_FMTBIT_S16_LE | \
|
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SNDRV_PCM_FMTBIT_U16_LE | \
|
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SNDRV_PCM_FMTBIT_S24_LE | \
|
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SNDRV_PCM_FMTBIT_U24_LE | \
|
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SNDRV_PCM_FMTBIT_S24_3LE | \
|
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SNDRV_PCM_FMTBIT_U24_3LE | \
|
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SNDRV_PCM_FMTBIT_S32_LE | \
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SNDRV_PCM_FMTBIT_U32_LE)
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|
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@ -1098,6 +1167,7 @@ static int davinci_mcasp_probe(struct platform_device *pdev)
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dma_data = &dev->dma_params[SNDRV_PCM_STREAM_PLAYBACK];
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dma_data->asp_chan_q = pdata->asp_chan_q;
|
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dma_data->ram_chan_q = pdata->ram_chan_q;
|
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dma_data->sram_pool = pdata->sram_pool;
|
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dma_data->sram_size = pdata->sram_size_playback;
|
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dma_data->dma_addr = (dma_addr_t) (pdata->tx_dma_offset +
|
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mem->start);
|
||||
@ -1115,6 +1185,7 @@ static int davinci_mcasp_probe(struct platform_device *pdev)
|
||||
dma_data = &dev->dma_params[SNDRV_PCM_STREAM_CAPTURE];
|
||||
dma_data->asp_chan_q = pdata->asp_chan_q;
|
||||
dma_data->ram_chan_q = pdata->ram_chan_q;
|
||||
dma_data->sram_pool = pdata->sram_pool;
|
||||
dma_data->sram_size = pdata->sram_size_capture;
|
||||
dma_data->dma_addr = (dma_addr_t)(pdata->rx_dma_offset +
|
||||
mem->start);
|
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|
@ -23,7 +23,7 @@
|
||||
|
||||
#include "davinci-pcm.h"
|
||||
|
||||
#define DAVINCI_MCASP_RATES SNDRV_PCM_RATE_8000_96000
|
||||
#define DAVINCI_MCASP_RATES SNDRV_PCM_RATE_8000_192000
|
||||
#define DAVINCI_MCASP_I2S_DAI 0
|
||||
#define DAVINCI_MCASP_DIT_DAI 1
|
||||
|
||||
|
@ -16,6 +16,7 @@
|
||||
#include <linux/slab.h>
|
||||
#include <linux/dma-mapping.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/genalloc.h>
|
||||
|
||||
#include <sound/core.h>
|
||||
#include <sound/pcm.h>
|
||||
@ -23,7 +24,6 @@
|
||||
#include <sound/soc.h>
|
||||
|
||||
#include <asm/dma.h>
|
||||
#include <mach/sram.h>
|
||||
|
||||
#include "davinci-pcm.h"
|
||||
|
||||
@ -67,13 +67,9 @@ static struct snd_pcm_hardware pcm_hardware_playback = {
|
||||
SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME|
|
||||
SNDRV_PCM_INFO_BATCH),
|
||||
.formats = DAVINCI_PCM_FMTBITS,
|
||||
.rates = (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |
|
||||
SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_32000 |
|
||||
SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |
|
||||
SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 |
|
||||
SNDRV_PCM_RATE_KNOT),
|
||||
.rates = SNDRV_PCM_RATE_8000_192000 | SNDRV_PCM_RATE_KNOT,
|
||||
.rate_min = 8000,
|
||||
.rate_max = 96000,
|
||||
.rate_max = 192000,
|
||||
.channels_min = 2,
|
||||
.channels_max = 384,
|
||||
.buffer_bytes_max = 128 * 1024,
|
||||
@ -90,13 +86,9 @@ static struct snd_pcm_hardware pcm_hardware_capture = {
|
||||
SNDRV_PCM_INFO_PAUSE |
|
||||
SNDRV_PCM_INFO_BATCH),
|
||||
.formats = DAVINCI_PCM_FMTBITS,
|
||||
.rates = (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |
|
||||
SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_32000 |
|
||||
SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |
|
||||
SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 |
|
||||
SNDRV_PCM_RATE_KNOT),
|
||||
.rates = SNDRV_PCM_RATE_8000_192000 | SNDRV_PCM_RATE_KNOT,
|
||||
.rate_min = 8000,
|
||||
.rate_max = 96000,
|
||||
.rate_max = 192000,
|
||||
.channels_min = 2,
|
||||
.channels_max = 384,
|
||||
.buffer_bytes_max = 128 * 1024,
|
||||
@ -259,7 +251,9 @@ static void davinci_pcm_dma_irq(unsigned link, u16 ch_status, void *data)
|
||||
}
|
||||
}
|
||||
|
||||
static int allocate_sram(struct snd_pcm_substream *substream, unsigned size,
|
||||
#ifdef CONFIG_GENERIC_ALLOCATOR
|
||||
static int allocate_sram(struct snd_pcm_substream *substream,
|
||||
struct gen_pool *sram_pool, unsigned size,
|
||||
struct snd_pcm_hardware *ppcm)
|
||||
{
|
||||
struct snd_dma_buffer *buf = &substream->dma_buffer;
|
||||
@ -271,9 +265,10 @@ static int allocate_sram(struct snd_pcm_substream *substream, unsigned size,
|
||||
return 0;
|
||||
|
||||
ppcm->period_bytes_max = size;
|
||||
iram_virt = sram_alloc(size, &iram_phys);
|
||||
iram_virt = (void *)gen_pool_alloc(sram_pool, size);
|
||||
if (!iram_virt)
|
||||
goto exit1;
|
||||
iram_phys = gen_pool_virt_to_phys(sram_pool, (unsigned)iram_virt);
|
||||
iram_dma = kzalloc(sizeof(*iram_dma), GFP_KERNEL);
|
||||
if (!iram_dma)
|
||||
goto exit2;
|
||||
@ -285,11 +280,33 @@ static int allocate_sram(struct snd_pcm_substream *substream, unsigned size,
|
||||
return 0;
|
||||
exit2:
|
||||
if (iram_virt)
|
||||
sram_free(iram_virt, size);
|
||||
gen_pool_free(sram_pool, (unsigned)iram_virt, size);
|
||||
exit1:
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
static void davinci_free_sram(struct snd_pcm_substream *substream,
|
||||
struct snd_dma_buffer *iram_dma)
|
||||
{
|
||||
struct davinci_runtime_data *prtd = substream->runtime->private_data;
|
||||
struct gen_pool *sram_pool = prtd->params->sram_pool;
|
||||
|
||||
gen_pool_free(sram_pool, (unsigned) iram_dma->area, iram_dma->bytes);
|
||||
}
|
||||
#else
|
||||
static int allocate_sram(struct snd_pcm_substream *substream,
|
||||
struct gen_pool *sram_pool, unsigned size,
|
||||
struct snd_pcm_hardware *ppcm)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void davinci_free_sram(struct snd_pcm_substream *substream,
|
||||
struct snd_dma_buffer *iram_dma)
|
||||
{
|
||||
}
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Only used with ping/pong.
|
||||
* This is called after runtime->dma_addr, period_bytes and data_type are valid
|
||||
@ -676,7 +693,7 @@ static int davinci_pcm_open(struct snd_pcm_substream *substream)
|
||||
|
||||
ppcm = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ?
|
||||
&pcm_hardware_playback : &pcm_hardware_capture;
|
||||
allocate_sram(substream, params->sram_size, ppcm);
|
||||
allocate_sram(substream, params->sram_pool, params->sram_size, ppcm);
|
||||
snd_soc_set_runtime_hwparams(substream, ppcm);
|
||||
/* ensure that buffer size is a multiple of period size */
|
||||
ret = snd_pcm_hw_constraint_integer(runtime,
|
||||
@ -819,7 +836,7 @@ static void davinci_pcm_free(struct snd_pcm *pcm)
|
||||
buf->area = NULL;
|
||||
iram_dma = buf->private_data;
|
||||
if (iram_dma) {
|
||||
sram_free(iram_dma->area, iram_dma->bytes);
|
||||
davinci_free_sram(substream, iram_dma);
|
||||
kfree(iram_dma);
|
||||
}
|
||||
}
|
||||
|
@ -12,6 +12,7 @@
|
||||
#ifndef _DAVINCI_PCM_H
|
||||
#define _DAVINCI_PCM_H
|
||||
|
||||
#include <linux/genalloc.h>
|
||||
#include <linux/platform_data/davinci_asp.h>
|
||||
#include <mach/edma.h>
|
||||
|
||||
@ -20,6 +21,7 @@ struct davinci_pcm_dma_params {
|
||||
unsigned short acnt;
|
||||
dma_addr_t dma_addr; /* device physical address for DMA */
|
||||
unsigned sram_size;
|
||||
struct gen_pool *sram_pool; /* SRAM gen_pool for ping pong */
|
||||
enum dma_event_q asp_chan_q; /* event queue number for ASP channel */
|
||||
enum dma_event_q ram_chan_q; /* event queue number for RAM channel */
|
||||
unsigned char data_type; /* xfer data type */
|
||||
|
Loading…
Reference in New Issue
Block a user